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1. (WO2018106698) LATERAL HIGH ELECTRON MOBILITY TRANSISTOR WITH INTEGRATED CLAMP DIODE
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Pub. No.: WO/2018/106698 International Application No.: PCT/US2017/064726
Publication Date: 14.06.2018 International Filing Date: 05.12.2017
IPC:
H01L 29/20 (2006.01) ,H01L 29/778 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
20
including, apart from doping materials or other impurities, only AIIIBV compounds
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
778
with two-dimensional charge carrier gas channel, e.g. HEMT
Applicants:
QROMIS, INC. [US/US]; 2306 Walsh Avenue Santa Clara, California 95051, US
Inventors:
ODNOBLYUDOV, Vladimir; US
AKTAS, Ozgur; US
Agent:
LIU, Rong; US
LARGENT, Craig C.; US
Priority Data:
62/430,64906.12.2016US
Title (EN) LATERAL HIGH ELECTRON MOBILITY TRANSISTOR WITH INTEGRATED CLAMP DIODE
(FR) TRANSISTOR HORIZONTAL À HAUTE MOBILITÉ ÉLECTRONIQUE AVEC DIODE DE NIVEAU INTÉGRÉE
Abstract:
(EN) A method of forming a semiconductor device includes providing an engineered substrate, forming a gallium nitride layer coupled to the engineered substrate, forming a channel region coupled to the gallium nitride layer by forming an aluminum gallium nitride barrier layer on the front surface of the gallium nitride layer, forming a gate dielectric layer coupled to the aluminum gallium nitride barrier layer in the central portion of the channel region, forming a gate contact coupled to the gate dielectric layer, forming a source contact at the first end of the channel region, forming a via at the second end of the channel region, filling the via with a conductive material, forming a drain contact coupled to the via, removing the engineered substrate to expose the back surface of the epitaxial gallium nitride layer, and forming a drain pad on the back surface of the epitaxial gallium nitride layer.
(FR) Un procédé de formation d'un dispositif à semi-conducteur consiste à utiliser un substrat modifié, à former une couche de nitrure de gallium couplée au substrat modifié, à former une région de canal couplée à la couche de nitrure de gallium par formation d'une couche barrière de nitrure de gallium d'aluminium sur la surface avant de la couche de nitrure de gallium, à former une couche diélectrique de grille couplée à la couche barrière de nitrure de gallium d'aluminium dans la partie centrale de la région de canal, à former un contact de grille couplé à la couche diélectrique de grille, à former un contact de source au niveau de la première extrémité de la région de canal, à former un trou d'interconnexion au niveau de la seconde extrémité de la région de canal, à remplir le trou d'interconnexion avec un matériau conducteur, à former un contact de drain couplé au trou d'interconnexion, à éliminer le substrat modifié pour exposer la surface arrière de la couche de nitrure de gallium épitaxiale, et à former un tampon de drain sur la surface arrière de la couche de nitrure de gallium épitaxiale.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)