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1. (WO2018101275) NEURAL NETWORK CIRCUIT DEVICE, NEURAL NETWORK, NEURAL NETWORK PROCESSING METHOD, AND NEURAL NETWORK EXECUTION PROGRAM

Pub. No.:    WO/2018/101275    International Application No.:    PCT/JP2017/042670
Publication Date: Fri Jun 08 01:59:59 CEST 2018 International Filing Date: Wed Nov 29 00:59:59 CET 2017
IPC: G06N 3/063
Applicants: TOKYO INSTITUTE OF TECHNOLOGY
国立大学法人東京工業大学
Inventors: NAKAHARA Hiroki
中原 啓貴
YONEKAWA Haruyoshi
米川 晴義
Title: NEURAL NETWORK CIRCUIT DEVICE, NEURAL NETWORK, NEURAL NETWORK PROCESSING METHOD, AND NEURAL NETWORK EXECUTION PROGRAM
Abstract:
[Problem] To provide a neural network circuit device that does not require a batch normalization circuit, a neural network, a neural network processing method, and a neural network execution program. [Solution] A binary neural network circuit (100) is provided with an input node for inputting input values x1-xn (xi) (binary) and an input unit (101) for inputting weights w1-wn (wi), an XNOR gate circuit (102) for receiving the input values x1-xn and weights w1-wn and taking the XNOR logic thereof, a multibit bias W' input unit (110) for inputting a multibit bias W', a summing circuit (103) for taking the sum total of each XNOR logic value and the multibit bias W', and an activation circuit (120) for outputting only a sign bit for a signal Y derived by summation.