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1. (WO2018100850) METHOD FOR MANUFACTURING SUBSTRATE PROCESSING DEVICE, CEILING HEATER AND SEMICONDUCTOR DEVICE
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Pub. No.: WO/2018/100850 International Application No.: PCT/JP2017/034052
Publication Date: 07.06.2018 International Filing Date: 21.09.2017
IPC:
H01L 21/31 (2006.01) ,C23C 16/46 (2006.01) ,H01L 21/318 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
44
characterised by the method of coating
46
characterised by the method used for heating the substrate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
318
composed of nitrides
Applicants:
株式会社KOKUSAI ELECTRIC KOKUSAI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区神田鍛冶町三丁目4番地 3-4, Kandakaji-cho, Chiyoda-ku, TOKYO 1010045, JP
Inventors:
小杉 哲也 KOSUGI, Tetsuya; JP
村田 等 MURATA, Hitoshi; JP
西堂 周平 SAIDO, Syuhei; JP
Priority Data:
2016-23416601.12.2016JP
Title (EN) METHOD FOR MANUFACTURING SUBSTRATE PROCESSING DEVICE, CEILING HEATER AND SEMICONDUCTOR DEVICE
(FR) PROCÉDÉ DE FABRICATION D'UN DISPOSITIF DE TRAITEMENT DE SUBSTRAT, DISPOSITIF DE CHAUFFAGE DE PLAFOND ET DISPOSITIF À SEMICONDUCTEUR
(JA) 基板処理装置、天井ヒータおよび半導体装置の製造方法
Abstract:
(EN) The present invention is provided with: a reaction tube that accommodates a plurality of substrates therein so as to be aligned in the longitudinal direction; a first heater that heats the inside of the reaction tube from the side of the reaction tube; and a second heater that heats the inside of the reaction tube from above the reaction tube. The second heater is configured so that the amount of heat generated by the second heater, in a region corresponding to a low-temperature section of the substrate accommodated in the upper section within the reaction tube when the same is heated by the first heater, becomes greater than the amount of heat generated in a region corresponding to a high-temperature section of the substrate.
(FR) La présente invention comprend : un tube de réaction qui reçoit une pluralité de substrats à l'intérieur de celui-ci de façon à être aligné dans la direction longitudinale; un premier dispositif de chauffage qui chauffe l'intérieur du tube de réaction à partir du côté du tube de réaction; et un second dispositif de chauffage qui chauffe l'intérieur du tube de réaction depuis le dessus du tube de réaction. Le second dispositif de chauffage est configuré de telle sorte que la quantité de chaleur générée par le second dispositif de chauffage, dans une région correspondant à une section à basse température du substrat reçu dans la section supérieure à l'intérieur du tube de réaction lorsque celui-ci est chauffé par le premier dispositif de chauffage, devient supérieure à la quantité de chaleur générée dans une région correspondant à une section à haute température du substrat.
(JA) 複数枚の基板を縦方向に並べて内部に収容する反応管と、反応管の側方から反応管内を加熱する第1ヒータと、反応管の上方から反応管内を加熱する第2ヒータと、を備え、第2ヒータは、第1ヒータで加熱した際の反応管内の上方に収容された基板の低温部に対応する領域における第2ヒータの発熱量を基板の高温部に対応する領域における発熱量よりも大きくするよう構成される。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)