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1. (WO2018093515) MICROELECTRONIC DEVICE PACKAGE HAVING ALTERNATELY STACKED DIE
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Pub. No.: WO/2018/093515 International Application No.: PCT/US2017/056998
Publication Date: 24.05.2018 International Filing Date: 17.10.2017
IPC:
H01L 25/065 (2006.01) ,H01L 25/07 (2006.01) ,H01L 23/48 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
CHEAH, Bok Eng; MY
LIM, Min Suet; MY
KONG, Jackson Chung Peng; MY
Agent:
PERDOK, Monique M.; US
ARORA, Suneel / U.S. Reg. No. 42,267; US
BEEKMAN, Marvin / U.S. Reg. No. 38,377; US
BLACK, David W. / U.S. Reg. No. 42,331; US
GOULD, James R. / U.S. Reg. No. 72,086; US
SCHEER, Bradley W. / U.S. Reg. No. 47,059; US
WOO, Justin N. / U.S. Reg. No. 62,686; US
Priority Data:
15/354,29117.11.2016US
Title (EN) MICROELECTRONIC DEVICE PACKAGE HAVING ALTERNATELY STACKED DIE
(FR) BOÎTIER DE DISPOSITIF MICROÉLECTRONIQUE AYANT UNE PUCE EMPILÉE EN ALTERNANCE
Abstract:
(EN) A microelectronic device package including multiple layers of stacked die. Multiple die layers in the package can include two or more die. At least two die in a first layer will be laterally spaced from one another to define a first gap extending in a first direction; and at least two die in a second layer will be laterally spaced from one another to define a second gap extending in a second direction that is angularly offset from the first direction. The first and second directions can be perpendicular to one another.
(FR) L'invention concerne un boîtier de dispositif microélectronique comprenant de multiples couches de puces empilées. De multiples couches de puce dans le boîtier peuvent comprendre deux puces ou plus. Au moins deux puces dans une première couche seront espacées latéralement l'une de l'autre pour définir un premier espace s'étendant dans une première direction; et au moins deux puces dans une seconde couche seront latéralement espacées les unes des autres pour définir un second espace s'étendant dans une seconde direction qui est décalée angulairement par rapport à la première direction. Les première et seconde directions peuvent être perpendiculaires l'une à l'autre.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)