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1. (WO2018089164) FAST SETTLING PEAK DETECTOR

Pub. No.:    WO/2018/089164    International Application No.:    PCT/US2017/056315
Publication Date: Fri May 18 01:59:59 CEST 2018 International Filing Date: Fri Oct 13 01:59:59 CEST 2017
IPC: H03F 1/52
G01R 19/04
H03G 3/30
Applicants: QUALCOMM INCORPORATED
Inventors: KARMAKER, Rahul
Title: FAST SETTLING PEAK DETECTOR
Abstract:
The present disclosure describes aspects of a fast settling peak detector. In some aspects, a peak detector circuit includes a first transistor having a gate coupled to an input of the circuit at which a signal is received and a drain coupled to a source of a second transistor. Current may flow in the first and second transistors responsive to the signal. The circuit also includes a third transistor having a gate coupled, via a signal-inverting component, to the input of the circuit and a drain coupled to a source of a fourth transistor. Through an inversion of the signal, other current flowing in the third and fourth transistor can reduce or cancel a frequency component of the current in the first and second transistors. In some cases, this precludes a need to filter the frequency component from an output of the circuit.