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1. (WO2018089137) VOLTAGE-MODE SERDES WITH SELF-CALIBRATION
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Pub. No.: WO/2018/089137 International Application No.: PCT/US2017/055437
Publication Date: 17.05.2018 International Filing Date: 05.10.2017
Chapter 2 Demand Filed: 21.06.2018
IPC:
H04L 25/02 (2006.01) ,H03K 19/0175 (2006.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
25
Baseband systems
02
Details
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
K
PULSE TECHNIQUE
19
Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
0175
Coupling arrangements; Interface arrangements
Applicants:
QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
HAFIZI, Madjid; US
SHING, George; US
Agent:
HALLMAN, Jonathan W.; US
Priority Data:
15/348,84110.11.2016US
Title (EN) VOLTAGE-MODE SERDES WITH SELF-CALIBRATION
(FR) SERDES EN MODE TENSION À AUTO-ÉTALONNAGE
Abstract:
(EN) A voltage-mode transmitter includes a calibration circuit having a replica circuit. By adjusting a feedback voltage driving a gate of a replica transistor in the replica circuit so that an impedance of the replica circuit matches an impedance of a variable resistor, the calibration circuit calibrates an output impedance of a single slice driver.
(FR) Un émetteur en mode tension comprend un circuit d'étalonnage ayant un circuit de réplique. Le fait d'ajuster une tension de rétroaction entraînant une grille d'un transistor de réplique dans le circuit de réplique de telle sorte qu'une impédance du circuit de réplique corresponde à une impédance d'une résistance variable, a pour effet que le circuit d'étalonnage calibre une impédance de sortie d'un pilote de tranche unique.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)