Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018088191) CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING CERAMIC SUBSTRATE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/088191 International Application No.: PCT/JP2017/038264
Publication Date: 17.05.2018 International Filing Date: 24.10.2017
IPC:
H05K 3/34 (2006.01) ,H05K 3/28 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
30
Assembling printed circuits with electric components, e.g. with resistor
32
electrically connecting electric components or wires to printed circuits
34
by soldering
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
22
Secondary treatment of printed circuits
28
Applying non-metallic protective coatings
Applicants:
株式会社村田製作所 MURATA MANUFACTURING CO., LTD. [JP/JP]; 京都府長岡京市東神足1丁目10番1号 10-1, Higashikotari 1-chome, Nagaokakyo-shi, Kyoto 6178555, JP
Inventors:
三野 洋輔 MINO, Yosuke; JP
Agent:
特許業務法人 安富国際特許事務所 YASUTOMI & ASSOCIATES; 大阪府大阪市淀川区宮原3丁目5番36号 5-36, Miyahara 3-chome, Yodogawa-ku, Osaka-shi, Osaka 5320003, JP
Priority Data:
2016-22091311.11.2016JP
Title (EN) CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING CERAMIC SUBSTRATE
(FR) SUBSTRAT EN CÉRAMIQUE ET PROCÉDÉ DE FABRICATION DE SUBSTRAT EN CÉRAMIQUE
(JA) セラミック基板及びセラミック基板の製造方法
Abstract:
(EN) This ceramic substrate is provided with a plurality of electrodes, and interelectrode wiring that connects the electrodes to each other, said electrodes and interelectrode wiring being on an electronic component mounting surface. The ceramic substrate is characterized in that, on the electronic component mounting surface, a resist is disposed over the interelectrode wiring.
(FR) Ce substrat en céramique est pourvu d'une pluralité d'électrodes, et d'un câblage inter-électrodes qui connecte les électrodes les unes aux autres, lesdites électrodes et le câblage entre électrodes étant sur une surface de montage de composant électronique. Le substrat céramique est caractérisé en ce que, sur la surface de montage de composant électronique, une réserve est disposée sur le câblage inter-électrodes.
(JA) 本発明のセラミック基板は、電子部品実装面に複数の電極及び上記電極間を接続する電極間配線が設けられたセラミック基板であって、上記電子部品実装面には上記電極間配線を跨ぐレジストが配置されていることを特徴とする。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)