WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Options
Query Language
Stem
Sort by:
List Length
1. (WO2018088093) COMPOSITE SUBSTRATE, SURFACE ACOUSTIC WAVE DEVICE, AND METHOD FOR MANUFACTURING COMPOSITE SUBSTRATE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/088093 International Application No.: PCT/JP2017/036707
Publication Date: 17.05.2018 International Filing Date: 10.10.2017
IPC:
H03H 9/25 (2006.01) ,C01B 33/12 (2006.01) ,H01L 21/02 (2006.01) ,H01L 27/12 (2006.01) ,H03H 3/08 (2006.01) ,H03H 9/145 (2006.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
H
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
9
Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
25
Constructional features of resonators using surface acoustic waves
C CHEMISTRY; METALLURGY
01
INORGANIC CHEMISTRY
B
NON-METALLIC ELEMENTS; COMPOUNDS THEREOF
33
Silicon; Compounds thereof
113
Silicon oxides; Hydrates thereof
12
Silica; Hydrates thereof, e.g. lepidoic silicic acid
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
H
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
3
Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
007
for the manufacture of electromechanical resonators or networks
08
for the manufacture of resonators or networks using surface acoustic waves
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
H
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
9
Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
02
Details
125
Driving means, e.g. electrodes, coils
145
for networks using surface acoustic waves
Applicants: SHIN-ETSU CHEMICAL CO., LTD.[JP/JP]; 6-1, Ohtemachi 2-chome, Chiyoda-ku, Tokyo 1000004, JP
Inventors: AKIYAMA Shoji; JP
TANNO Masayuki; JP
Agent: ORISAKA Shigeki; JP
Priority Data:
2016-22023811.11.2016JP
2017-08966628.04.2017JP
Title (EN) COMPOSITE SUBSTRATE, SURFACE ACOUSTIC WAVE DEVICE, AND METHOD FOR MANUFACTURING COMPOSITE SUBSTRATE
(FR) SUBSTRAT COMPOSITE, DISPOSITIF À ONDES ACOUSTIQUES DE SURFACE ET PROCÉDÉ DE FABRICATION DE SUBSTRAT COMPOSITE
(JA) 複合基板、表面弾性波デバイスおよび複合基板の製造方法
Abstract:
(EN) Provided are: a method for manufacturing a substrate having exceptional heat dissipation, and little loss with respect to high frequency waves, without requiring a high-temperature process in which diffusion of metal impurities occurs; and a highly thermally conductive substrate. This composite substrate has: a piezoelectric single crystal substrate; a support substrate; and an interposition layer provided between the piezoelectric single crystal substrate and the support substrate. The interposition layer is characterized by being a film that comprises an inorganic material, at least a part of the interposition layer being thermal synthesis silica. The interposition layer may be divided into at least two layers along the joining surface of the composite substrate, and a first interposition layer that contacts the support substrate preferably contains thermal synthesis silica.
(FR) L'invention concerne un procédé de fabrication d'un substrat qui présente une dissipation thermique exceptionnelle, et une faible perte par rapport aux ondes haute fréquence, ne nécessitant pas un traitement à haute température dans lequel se produit une diffusion d'impuretés métalliques; et un substrat hautement thermoconducteur. Ce substrat composite comprend : un substrat monocristallin piézoélectrique; un substrat de support; et une couche d'interposition disposée entre le substrat monocristallin piézoélectrique et le substrat de support. La couche d'interposition est caractérisée en ce qu'elle est un film qui comprend un matériau inorganique, au moins une partie de la couche d'interposition étant de la silice de synthèse thermique. La couche d'interposition peut être divisée en au moins deux couches le long de la surface de jonction du substrat composite, et une première couche d'interposition qui est en contact avec le substrat de support contient de préférence de la silice de synthèse thermique.
(JA) 金属不純物の拡散が生じる高温プロセスを必要とせず、放熱性に優れ、且つ高周波に対する損失の小さい基板の製造方法および高熱伝導性基板を提供する。 本発明の複合基板は、圧電単結晶基板と、支持基板と、前記圧電単結晶基板と前記支持基板との間に設けられた介在層とを有する複合基板である。介在層は、無機材料からなる膜であり、少なくともその一部が熱合成シリカであることを特徴とする。介在層は複合基板の接合面に沿って少なくとも2層に分かれていてもよく、支持基板に接する第1介在層が熱合成シリカを含有する層とするとよい。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)