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1. (WO2018086912) METHOD FOR TWO-SIDED POLISHING OF A SEMICONDUCTOR WAFER

Pub. No.:    WO/2018/086912    International Application No.:    PCT/EP2017/077571
Publication Date: Fri May 18 01:59:59 CEST 2018 International Filing Date: Sat Oct 28 01:59:59 CEST 2017
IPC: B24B 37/08
B24B 37/22
B24B 37/24
B24D 18/00
Applicants: SILTRONIC AG
Inventors: DUTSCHKE, Vladimir
Title: METHOD FOR TWO-SIDED POLISHING OF A SEMICONDUCTOR WAFER
Abstract:
The invention relates to a method for two-sided polishing of a semiconductor wafer, wherein polishing cloths having a hardness at room temperature of at least 80° according to Shore A and having a compressibility at room temperature of less than 3 % are fastened on a top and bottom polishing plate, wherein a semiconductor wafer is polished on both sides between a top and bottom polishing cloth, and wherein, in order to fasten the polishing cloths on the top and bottom polishing plates, the polishing cloths are adhered to the top and bottom polishing plates, a cloth having a compressibility at room temperature of at least 3 % is positioned between the two adhered polishing cloths as an intermediate layer and the two polishing cloths are then pressed to each other together with the cloth located therebetween for a specific time period.