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1. (WO2018086210) TFT SUBSTRATE AND MANUFACTURING METHOD THEREFOR
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/086210 International Application No.: PCT/CN2016/112253
Publication Date: 17.05.2018 International Filing Date: 27.12.2016
IPC:
H01L 27/12 (2006.01) ,H01L 27/32 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28
including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32
with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; 中国湖北省武汉市 东湖开发区高新大道666号生物城C5栋 Building C5,Biolake of Optics Valley,No.666 Gaoxin Avenue,Wuhan East Lake High-tech Development Zone Wuhan, Hubei 430070, CN
Inventors:
张鹏振 ZHANG, Pengzhen; CN
Agent:
深圳市德力知识产权代理事务所 COMIPS INTELLECTUAL PROPERTY OFFICE; 中国广东省深圳市 福田区上步中路深勘大厦15E Room 15E, Shenkan Building, Shangbu Zhong Road, Futian District Shenzhen, Guangdong 518028, CN
Priority Data:
201610983782.408.11.2016CN
Title (EN) TFT SUBSTRATE AND MANUFACTURING METHOD THEREFOR
(FR) SUBSTRAT DE TRANSISTOR À COUCHES MINCES ET SON PROCÉDÉ DE FABRICATION
(ZH) TFT基板及其制作方法
Abstract:
(EN) A TFT substrate and a manufacturing method therefor. A transparent polypropylene film (41) is added above an IGZO active layer (20) to shield UV light, in order to avoid the impact of the UV light on the stability of the IGZO active layer (20), so that the stability of a TFT device is improved without adding a photomask. The transparent polypropylene film (41) can be used as a planarization layer, so as not to change the original manufacturing process of an OLED display panel and increase manufacturing process costs. The manufactured TFT substrate is of a back channel etch type IGZO-TFT structure, and has fewer etching processes and less production costs compared with the traditional etching barrier type IGZO-TFT structure.
(FR) La présente invention concerne un substrat de transistor à couches minces (TFT) et son procédé de fabrication. Un film de polypropylène transparent (41) est ajouté sur une couche active d'IGZO (20) pour la protéger de la lumière UV, afin d'éviter l'impact de la lumière UV sur la stabilité de la couche active d'IGZO (20), de telle sorte que la stabilité d'un dispositif TFT est améliorée sans ajouter de photo-masque. Le film de polypropylène transparent (41) peut être utilisé en tant que couche de planarisation, de manière à ne pas modifier le processus de fabrication d'origine d'un panneau d'affichage à DELO, ni à augmenter les coûts du processus de fabrication. Le substrat TFT fabriqué est constitué d'une structure TFT-IGZO de type gravure de canal arrière, et présente moins de processus de gravure et des coûts de fabrication réduits par comparaison avec la structure TFT-IGZO de type barrière à la gravure classique.
(ZH) 一种TFT基板及其制作方法,通过在IGZO有源层(20)的上方增加一层透明聚丙烯薄膜(41),起到屏蔽UV光的作用,防止UV光对IGZO有源层(20)的稳定性产生影响,在不增加光罩的基础上提高了TFT器件的稳定性;透明聚丙烯薄膜(41)可作为平坦层使用,从而不改变OLED显示面板原有的制程工艺,不增加制程成本;制作的TFT基板采用背沟道刻蚀型的IGZO-TFT结构,与传统的刻蚀阻挡型的IGZO-TFT结构相比,光刻制程少,生产成本低。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)