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1. (WO2018084473) METHOD FOR PROCESSING INPUT ON BASIS OF NEURAL NETWORK LEARNING AND APPARATUS THEREFOR
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/084473 International Application No.: PCT/KR2017/011638
Publication Date: 11.05.2018 International Filing Date: 20.10.2017
IPC:
G06N 3/08 (2006.01) ,G06N 3/04 (2006.01)
Applicants: SAMSUNG ELECTRONICS CO., LTD.[KR/KR]; 129, Samsung-ro, Yeongtong-gu Suwon-si Gyeonggi-do 16677, KR
Inventors: GERACI, James Russell; KR
KAPOOR, Parichay; KR
Agent: BAE, KIM & LEE IP GROUP; 11th Floor, Shinduk Bldg., 343, Gangnam-daero Seocho-gu Seoul 06626, KR
Priority Data:
10-2016-014773507.11.2016KR
10-2017-002889907.03.2017KR
Title (EN) METHOD FOR PROCESSING INPUT ON BASIS OF NEURAL NETWORK LEARNING AND APPARATUS THEREFOR
(FR) PROCÉDÉ DE TRAITEMENT D’ENTRÉE SUR LA BASE D’UN APPRENTISSAGE DE RÉSEAU NEURONAL ET APPAREIL ASSOCIÉ
(KO) 신경망 학습에 기반한 입력 처리 방법 및 이를 위한 장치
Abstract: front page image
(EN) An electronic device is disclosed. The electronic device may comprise: a memory for storing parameter sets, each of which includes one weight value and a set of biases corresponding to respective n occlusion levels (where, n>1) among a plurality of occlusion levels within a predetermined range; and at least one processor configured to input input data to a neural network and obtain output data. Various other embodiments recognized from the specification are also possible.
(FR) La présente invention concerne un dispositif électronique. Le dispositif électronique peut comprendre : une mémoire pour stocker des ensembles de paramètres dont chacun inclut une valeur pondérée et un ensemble de biais correspondant à n niveaux d’occlusion respectifs (n > 1) parmi une pluralité de niveaux d’occlusion à l’intérieur d’une plage prédéterminée ; et au moins un processeur configuré pour entrer des données d’entrée dans un réseau neuronal et pour obtenir des données de sortie. Divers autres modes de réalisation reconnus d’après la description sont également possibles.
(KO) 전자 장치가 개시된다. 상기 전자 장치는, 각각, 하나의 가중치 및 소정 범위 내의 복수개의 오클루전(occlusion) 레벨 중 n개(단, n>1)의 오클루전 레벨에 각각 대응하는 바이어스 세트를 포함하는, 파라미터 세트가 저장된 메모리, 및 입력 데이터를 상기 신경망에 입력하여 출력 데이터를 획득하도록 설정되는 적어도 하나의 프로세서를 포함할 수 있다. 이 외에도 명세서를 통해 파악되는 다양한 실시 예가 가능하다.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)