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1. (WO2018083997) ELECTRONIC DEVICE
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Pub. No.: WO/2018/083997 International Application No.: PCT/JP2017/037894
Publication Date: 11.05.2018 International Filing Date: 19.10.2017
IPC:
H05K 3/28 (2006.01) ,H01L 23/28 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
22
Secondary treatment of printed circuits
28
Applying non-metallic protective coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
Applicants:
株式会社デンソー DENSO CORPORATION [JP/JP]; 愛知県刈谷市昭和町1丁目1番地 1-1, Showa-cho, Kariya-city, Aichi 4488661, JP
Inventors:
鈴木 耕佑 SUZUKI Kosuke; JP
柏崎 篤志 KASHIWAZAKI Atsushi; JP
眞田 祐紀 SANADA Yuki; JP
中村 俊浩 NAKAMURA Toshihiro; JP
内堀 慎也 UCHIBORI Shinya; JP
Agent:
特許業務法人ゆうあい特許事務所 YOU-I PATENT FIRM; 愛知県名古屋市中区錦一丁目6番5号 名古屋錦シティビル4階 Nagoya Nishiki City Bldg. 4F 1-6-5, Nishiki, Naka-ku, Nagoya-shi, Aichi 4600003, JP
Priority Data:
2016-21454101.11.2016JP
Title (EN) ELECTRONIC DEVICE
(FR) DISPOSITIF ÉLECTRONIQUE
(JA) 電子装置
Abstract:
(EN) The purpose of the present invention is to achieve a state in which pattern coating portions (3a) of a solder resist (3) covering linear portions (1ca) of adjacent wiring patterns (1c) are separated outside a resin mold portion (4). In this way, even if a crack develops in the solder resist (3), the crack is not formed in such a way as to connect the adjacent wiring patterns (1c). Accordingly, even if water enters the crack as a result of condensation or the like, it becomes possible to prevent a short-circuit between the adjacent wiring patterns (1c).
(FR) La présente invention concerne l'obtention d'un état dans lequel des parties de revêtement de motif (3a) d'une réserve de soudure (3) recouvrant des parties linéaires (1ca) de motifs de câblage adjacents (1c) sont séparées à l'extérieur d'une partie de moule en résine (4). De cette manière, même si une fissure se développe dans la réserve de soudure (3), la fissure n'est pas formée de manière à connecter les motifs de câblage adjacents (1c). Par conséquent, même si de l'eau entre dans la fissure suite à de la condensation ou analogue, il devient possible d'empêcher un court-circuit entre les motifs de câblage adjacents (1c).
(JA) 隣り合う配線パターン(1c)の直線状部分(1ca)同士を覆っているソルダレジスト(3)のパターン被覆部(3a)が樹脂モールド部(4)の外部において離れた状態となるようにする。これにより、仮にソルダレジスト(3)にクラックが発生したとしても、クラックが隣り合う配線パターン(1c)を繋ぐように形成されることはない。したがって、結露が生じたとき等にクラック内に水分が入り込んだとしても、隣り合う配線パターン(1c)間が短絡することを抑制することができる。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)