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1. (WO2018079276) POWER SUPPLY DEVICE
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Pub. No.: WO/2018/079276 International Application No.: PCT/JP2017/036942
Publication Date: 03.05.2018 International Filing Date: 12.10.2017
IPC:
H02J 7/00 (2006.01) ,G05F 1/10 (2006.01) ,H01M 10/42 (2006.01)
H ELECTRICITY
02
GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
J
CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
7
Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
G PHYSICS
05
CONTROLLING; REGULATING
F
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
1
Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
10
Regulating voltage or current
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
M
PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
10
Secondary cells; Manufacture thereof
42
Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
Applicants:
三洋電機株式会社 SANYO ELECTRIC CO., LTD. [JP/JP]; 大阪府大東市三洋町1番1号 1-1, Sanyo-cho, Daito-shi, Osaka 5748534, JP
Inventors:
竹内 基二 TAKEUCHI Motoji; --
表 祐介 OMOTE Yusuke; --
廣田 拓也 HIROTA Takuya; --
亀山 寿 KAMEYAMA Hisashi; --
張 志旭 CHANG Jeewook; --
浜田 充弘 HAMADA Mitsuhiro; --
Agent:
徳田 佳昭 TOKUDA Yoshiaki; JP
西田 浩希 NISHIDA Hiroki; JP
Priority Data:
2016-21232928.10.2016JP
Title (EN) POWER SUPPLY DEVICE
(FR) DISPOSITIF D’ALIMENTATION ÉLECTRIQUE
(JA) 電源装置
Abstract:
(EN) The present invention cuts off overcurrent at a time of reverse connection of a charger while inhibiting avalanche breakdown in a current cutoff switch 2 due to a kickback voltage. This power supply device is provided with a spike absorption circuit (4) that prevents avalanche breakdown in a current cutoff switch (2) which is a semiconductor element connected to a secondary battery (1), due to a kickback voltage when a load current is cut off. The spike absorption circuit (4) is a series circuit of diodes (5) and a protective switch (6) which is a semiconductor element, and is provided with a small signal switch (7) that controls on/off switching of a protective switch (6), and a delay circuit (8) that maintains the on state of the small signal switch (7) for a set time (T) from a current cutoff timing by the current cutoff switch (2). The delay circuit (8) turns on the small signal switch (7) in the set time (T), the small signal switch (7) turns on the protective switch (6), and the spike absorption circuit (4) attenuates the kickback voltage.
(FR) La présente invention coupe la surintensité au moment de connexion inverse d’un dispotif de charge charge tout en inhibant le claquage par avalanche dans un commutateur de coupure (2) de courant en raison d’une tension de retour. Ce dispositif d’alimentation électrique comporte un circuit d’absorption de pic (4) qui empêche le claquage par avalanche dans un commutateur de coupure (2) de courant qui est un élément semi-conducteur connecté à un accumulateur (1), en raison d’une tension de retour lorsqu’un courant de charge est coupé. Le circuit d’absorption de pic (4) est un circuit en série de diodes (5) et un commutateur protecteur (6) qui est un élément semi-conducteur, et comporte un petit commutateur de signal (7) qui commande l’activation/la désactivation d’un commutateur protecteur (6), et un circuit de retard (8) qui maintient l’état actif du petit commutateur de signal (7) pendant un temps (T) défini à partir d’un instant de coupure de courant par le commutateur de coupure (2) de courant. Le circuit de retard (8) active le petit commutateur de signal (7) pendant le temps (T) défini, le petit commutateur de signal (7) active le commutateur protecteur (6), et le circuit d’absorption de pic (4) atténue la tension de retour.
(JA) キックバック電圧による電流遮断スイッチ2のアバランシェ破壊を阻止しながら、充電器の逆接続時の過電流を遮断する。 負荷電流の遮断時に、二次電池(1)に接続している半導体素子である電流遮断スイッチ(2)のキックバック電圧によるアバランシェ破壊を防止するスパイク吸収回路(4)を備える電源装置であって、スパイク吸収回路(4)は半導体素子の保護用スイッチ(6)とダイオード(5)との直列回路で、保護用スイッチ(6)をオンオフに制御する小信号スイッチ(7)と、電流遮断スイッチ(2)の電流遮断タイミングから設定時間(T)は小信号スイッチ(7)をオン状態に保持する遅延回路(8)を備え、遅延回路(8)が設定時間(T)において小信号スイッチ(7)をオン状態とし、小信号スイッチ(7)が保護用スイッチ(6)をオン状態としてスパイク吸収回路(4)がキックバック電圧を減衰する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)