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1. (WO2018078451) SYNTHESIS PATH FOR TRANSFORMING CONCURRENT PROGRAMS INTO HARDWARE DEPLOYABLE ON FPGA-BASED CLOUD INFRASTRUCTURES

Pub. No.:    WO/2018/078451    International Application No.:    PCT/IB2017/001485
Publication Date: Fri May 04 01:59:59 CEST 2018 International Filing Date: Thu Nov 02 00:59:59 CET 2017
IPC: G06F 11/36
G06F 17/50
Applicants: RECONFIGURE.IO LIMITED
Inventors: MAMAGHANI, Mahdi, Jelodari
TAYLOR, Robert, James
Title: SYNTHESIS PATH FOR TRANSFORMING CONCURRENT PROGRAMS INTO HARDWARE DEPLOYABLE ON FPGA-BASED CLOUD INFRASTRUCTURES
Abstract:
Exploiting FPGAs for acceleration may be performed by transforming concurrent programs. One example mode of operation may provide one or more of creating synchronous hardware accelerators from concurrent asynchronous programs at software level, by obtaining input as software instructions describing concurrent behavior via a model of communicating sequential processes (CSP) of message exchange between concurrent processes performed via channels, mapping, on a computing device, each of the concurrent processes to synchronous dataflow primitives, comprising at least one of join, fork, merge, steer, variable, and arbiter, producing a clocked digital logic description for upload to one or more field programmable gate array (FPGA) devices, performing primitive remapping of the output design for throughput, clock rate and resource usage via retiming, and creating an annotated graph of the input software description for debugging of concurrent code for the field FPGA devices.