Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018066016) METHOD FOR MANUFACTURING SOLAR CELL HAVING HIGH PHOTOELECTRIC CONVERSION EFFICIENCY, AND SOLAR CELL HAVING HIGH PHOTOELECTRIC CONVERSION EFFICIENCY
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2018/066016 International Application No.: PCT/JP2016/004492
Publication Date: 12.04.2018 International Filing Date: 05.10.2016
IPC:
H01L 31/0224 (2006.01) ,H01L 31/18 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
Details
0224
Electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
18
Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Applicants:
信越化学工業株式会社 SHIN-ETSU CHEMICAL CO.,LTD. [JP/JP]; 東京都千代田区大手町二丁目6番1号 6-1, Ohtemachi 2-chome, Chiyoda-ku, Tokyo 1000004, JP
Inventors:
渡部 武紀 WATABE, Takenori; JP
橋上 洋 HASHIGAMI, Hiroshi; JP
大塚 寛之 OHTSUKA, Hiroyuki; JP
Agent:
好宮 幹夫 YOSHIMIYA, Mikio; JP
小林 俊弘 KOBAYASHI, Toshihiro; JP
Priority Data:
Title (EN) METHOD FOR MANUFACTURING SOLAR CELL HAVING HIGH PHOTOELECTRIC CONVERSION EFFICIENCY, AND SOLAR CELL HAVING HIGH PHOTOELECTRIC CONVERSION EFFICIENCY
(FR) PROCÉDÉ DE FABRICATION DE CELLULE SOLAIRE AYANT UNE EFFICACITÉ DE CONVERSION PHOTOÉLECTRIQUE ÉLEVÉE, ET CELLULE SOLAIRE AYANT UNE EFFICACITÉ DE CONVERSION PHOTOÉLECTRIQUE ÉLEVÉE
(JA) 高光電変換効率太陽電池の製造方法及び高光電変換効率太陽電池
Abstract:
(EN) Disclosed is a solar cell manufacturing method characterized by having: a step for preparing a semiconductor silicon substrate, which has an electrode that is formed at least on one main surface by firing an electrode precursor, and which has a PN junction, said semiconductor silicon substrate being at a temperature below 100°C; and a step for annealing the semiconductor silicon substrate at a temperature not below 100°C but not above 450°C. Consequently, the method for manufacturing the solar cell wherein a deterioration phenomenon is suppressed is provided, said deterioration phenomenon being the phenomenon where solar cell output deteriorates when the solar cell is left as it is at a room temperature in the air.
(FR) L'invention concerne un procédé de fabrication de cellule solaire caractérisé en ce qu'il comprend : une étape de préparation d'un substrat de silicium semi-conducteur, qui a une électrode qui est formée au moins sur une surface principale par cuisson d'un précurseur d'électrode, et qui présente une jonction PN, ledit substrat de silicium semi-conducteur étant à une température inférieure à 100 °C; et une étape de recuit du substrat de silicium semi-conducteur à une température pas inférieur à 100 °C mais pas supérieure à 450 °C par conséquent, le procédé de fabrication de la cellule solaire dans lequel un phénomène de détérioration est supprimé est décrit, ledit phénomène de détérioration étant le phénomène où la sortie de cellule solaire se détériore lorsque la cellule solaire est laissée telle qu'elle est à une température ambiante dans l'air.
(JA) 本発明は、少なくとも一方の主表面上に電極前駆体を焼成することにより形成された電極を有し、PN接合を有する100℃未満の半導体シリコン基板を準備する工程と、前記半導体シリコン基板を100℃以上450℃以下でアニール処理する工程とを有することを特徴とする太陽電池の製造方法である。これにより、室温・大気中に放置しておくだけで太陽電池の出力が低下するという劣化現象が抑制された太陽電池を製造する方法が提供される。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)