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1. (WO2018063730) MULTI-DIMENSIONAL OPTIMIZATION OF ELECTRICAL PARAMETERS FOR MEMORY TRAINING
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Pub. No.: WO/2018/063730 International Application No.: PCT/US2017/049553
Publication Date: 05.04.2018 International Filing Date: 31.08.2017
IPC:
G11C 29/02 (2006.01) ,G11C 29/50 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
02
Detection or location of defective auxiliary circuits, e.g. defective refresh counters
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
04
Detection or location of defective memory elements
50
Marginal testing, e.g. race, voltage or current testing
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054-1549, US
Inventors:
UDUEBHO, Oseghale O.; US
NORMAN, Adam J.; US
Agent:
GUPTA, Rishi; US
Priority Data:
15/280,32029.09.2016US
Title (EN) MULTI-DIMENSIONAL OPTIMIZATION OF ELECTRICAL PARAMETERS FOR MEMORY TRAINING
(FR) OPTIMISATION MULTIDIMENSIONNELLE DE PARAMÈTRES ÉLECTRIQUES POUR L'APPRENTISSAGE DE LA MÉMOIRE
Abstract:
(EN) Aspects of the embodiments are directed to systems, methods, and devices for generating a design of experiments (DOE) matrix, the DOE matrix comprising a set of possible combinations of values for a plurality of electrical parameters; iteratively applying each combination of values for the plurality of electrical parameters to one or more memory pins; determining a margin response for each combination of values; generating a prediction function based on a correlation of the margin response and each combination of values; and optimizing the plurality of electrical parameters based on the prediction function.
(FR) Selon certains modes de réalisation, l'invention concerne des systèmes, des procédés et des dispositifs destinés à générer une matrice de conception d'expériences (DOE), la matrice de DOE comprenant un ensemble de combinaisons possibles de valeurs pour une pluralité de paramètres électriques; à appliquer de manière itérative chaque combinaison de valeurs pour la pluralité de paramètres électriques à une ou plusieurs broches de mémoire; à déterminer une réponse de marge pour chaque combinaison de valeurs; à générer une fonction de prédiction sur la base d'une corrélation de la réponse de marge et de chaque combinaison de valeurs; et à optimiser la pluralité de paramètres électriques sur la base de la fonction de prédiction.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)