Search International and National Patent Collections

1. (WO2018063459) METHOD OF INTEGRATION OF ONO STACK FORMATION INTO THICK GATE OXIDE CMOS FLOW

Pub. No.:    WO/2018/063459    International Application No.:    PCT/US2017/038136
Publication Date: Fri Apr 06 01:59:59 CEST 2018 International Filing Date: Tue Jun 20 01:59:59 CEST 2017
IPC: H01L 21/28
H01L 21/762
H01L 27/115
Applicants: CYPRESS SEMICONDUCTOR CORPORATION
Inventors: RAMKUMAR, Krishnaswamy
Title: METHOD OF INTEGRATION OF ONO STACK FORMATION INTO THICK GATE OXIDE CMOS FLOW
Abstract:
A method of integrating a silicon-oxide-nitride-oxide-silicon (SONOS) transistor into a complementary metal-oxide-silicon (CMOS) baseline process includes the steps of forming a gate oxide layer over a substrate, forming a dielectric stack over the gate oxide layer, patterning the dielectric stack to form a non-volatile (NV) gate stack of the SONOS transistor directly over the substrate, and patterning the gate oxide layer to form a gate oxide of at least one metal-oxide-silicon (MOS) transistor.