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1. WO2018058522 - METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, AND ARRAY SUBSTRATE

Publication Number WO/2018/058522
Publication Date 05.04.2018
International Application No. PCT/CN2016/101072
International Filing Date 30.09.2016
IPC
H01L 21/77 2017.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L 27/12 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/786 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
786Thin-film transistors
CPC
H01L 21/34
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
34the devices having semiconductor bodies not provided for in groups ; H01L21/0405, H01L21/0445; , H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
H01L 21/77
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L 27/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
H01L 27/1222
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1222with a particular composition, shape or crystalline structure of the active layer
H01L 29/66969
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66969of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
H01L 29/786
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
Applicants
  • 深圳市柔宇科技有限公司 SHENZHEN ROYOLE TECHNOLOGIES CO., LTD. [CN]/[CN]
Inventors
  • 叶江波 YE, Jiangbo
Agents
  • 广州三环专利商标代理有限公司 SCIHEAD IP LAW FIRM
Priority Data
Publication Language Chinese (zh)
Filing Language Chinese (ZH)
Designated States
Title
(EN) METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, AND ARRAY SUBSTRATE
(FR) PROCÉDÉ DE FABRICATION D'UN TRANSISTOR À COUCHES MINCES, ET SUBSTRAT DE RÉSEAU
(ZH) 薄膜晶体管制造方法及阵列基板
Abstract
(EN) Provided are a thin film transistor and a manufacturing method therefor. The method comprises: sequentially forming a gate electrode, a gate insulation layer and an oxide semiconductor layer on a substrate; forming a photoresist material layer on the oxide semiconductor layer, and performing a half-tone masking process or a grey-tone masking process on the photoresist material layer to form a first photoresist layer, wherein the first photoresist layer has a first region with a first thickness and a second region with a second thickness, and the second region is located at two sides of the first region; removing the second region to expose the oxide semiconductor layer below the second region; removing a partial thickness of the oxide semiconductor layer below the second region, wherein a first part of thickness of the oxide semiconductor layer is equal to a second part of thickness of the oxide semiconductor layer; and forming a metal layer on the oxide semiconductor layer and the gate insulation layer and patterning same, and forming a source electrode, a drain electrode and a channel region.
(FR) L'invention concerne un transistor à couches minces et son procédé de fabrication. Le procédé consiste à : former de façon séquentielle une électrode de grille, une couche d'isolation de grille et une couche semi-conductrice à oxyde sur un substrat; former une couche de matériau de résine photosensible sur la couche semi-conductrice à oxyde, et réaliser un processus de masquage simili ou un processus de masquage en ton gris sur la couche de matériau de résine photosensible pour former une première couche de résine photosensible, la première couche de résine photosensible ayant une première région ayant une première épaisseur et une seconde région ayant une seconde épaisseur, et la seconde région étant située au niveau de deux côtés de la première région; éliminer la seconde région pour exposer la couche semi-conductrice à oxyde au-dessous de la seconde région; éliminer une épaisseur partielle de la couche semi-conductrice à oxyde au-dessous de la seconde région, une première partie d'épaisseur de la couche semi-conductrice à oxyde étant égale à une seconde partie d'épaisseur de la couche semi-conductrice à oxyde; et former une couche métallique sur la couche semi-conductrice à oxyde et la couche d'isolation de grille et former des motifs sur celle-ci, et former une électrode de source, une électrode de drain et une région de canal.
(ZH) 提供了一种薄膜晶体管及其制造方法。方法包括:在基板上依次形成栅极、栅极绝缘层及氧化物半导体层;在氧化物半导体层上形成光阻材料层,通过半色调掩膜或者灰色调掩工艺使光阻材料层形成第一光阻层,第一光阻层具有第一厚度的第一区域和具有第二厚度的第二区域,其中第二区域位于第一区域两侧;去除第二区域,露出位于第二区域下方的氧化物半导体层;去除第二区域下方的部分厚度的氧化物半导体层;其中氧化物半导体层的第一部分的厚度等于氧化物半导体层的第二部分的厚度,在氧化物半导体层及栅极绝缘层上形成金属层并进行图案化,形成源漏极及沟道区域。
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