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1. (WO2018056963) CONDUCTIVE BRIDGE RANDOM ACCESS MEMORY (CBRAM) DEVICES WITH GRADED CONDUCTIVITY ELECTROLYTE LAYER
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Pub. No.: WO/2018/056963 International Application No.: PCT/US2016/052790
Publication Date: 29.03.2018 International Filing Date: 21.09.2016
IPC:
H01L 45/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45
Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
Applicants: INTEL CORPORATION[US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors: KARPOV, Elijah V.; US
MUKHERJEE, Niloy; US
PILLARISETTY, Ravi; US
MAJHI, Prashant; US
Agent: BRASK, Justin, K.; US
Priority Data:
Title (EN) CONDUCTIVE BRIDGE RANDOM ACCESS MEMORY (CBRAM) DEVICES WITH GRADED CONDUCTIVITY ELECTROLYTE LAYER
(FR) DISPOSITIFS DE MÉMOIRE VIVE À PONT CONDUCTEUR (CBRAM) À COUCHE D'ÉLECTROLYTE À CONDUCTIVITÉ CALIBRÉE
Abstract:
(EN) Conductive bridge random access memory (CBRAM) devices with graded conductivity electrolyte layers are described. In an example, a conductive bridge random access memory (CBRAM) device includes a conductive interconnect disposed in an inter-layer dielectric (ILD) layer disposed above a substrate. A CBRAM element is disposed on the conductive interconnect. The CBRAM element includes an active electrode layer disposed on the conductive interconnect. A resistance switching layer is disposed above the active electrode layer. A passive electrode layer is disposed above the resistance switching layer. The resistance switching layer has a region of higher conductivity proximate to the passive electrode, the region of higher conductivity above and materially graded to a region of lower conductivity proximate to the underlying active electrode.
(FR) L'invention concerne des dispositifs de mémoire vive à pont conducteur (CBRAM) ayant des couches d'électrolyte à conductivité calibrée. Dans un exemple, un dispositif de mémoire vive à pont conducteur (CBRAM) comprend une interconnexion conductrice disposée dans une couche diélectrique inter-couche (ILD) disposée au-dessus d'un substrat. Un élément CBRAM est disposé sur l'interconnexion conductrice. L'élément CBRAM comprend une couche d'électrode active disposée sur l'interconnexion conductrice. Une couche de commutation de résistance est disposée sur la couche d'électrode active. Une couche d'électrode passive est disposée sur la couche à commutation de résistance. La couche de commutation de résistance présente une région de conductivité supérieure à proximité de l'électrode passive, la région de conductivité supérieure au-dessus et calibrée matériellement à une région de conductivité inférieure à proximité de l'électrode active sous-jacente.
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African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)