Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018055667) SEMICONDUCTOR DEVICE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/055667 International Application No.: PCT/JP2016/077664
Publication Date: 29.03.2018 International Filing Date: 20.09.2016
IPC:
H01L 25/07 (2006.01) ,H01L 23/28 (2006.01) ,H01L 25/18 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
林田 幸昌 HAYASHIDA, Yukimasa; JP
大宅 大介 OYA, Daisuke; JP
松本 貴之 MATSUMOTO, Takayuki; JP
伊達 龍太郎 DATE, Ryutaro; JP
Agent:
高田 守 TAKADA, Mamoru; JP
高橋 英樹 TAKAHASHI, Hideki; JP
Priority Data:
Title (EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEURS
(JA) 半導体装置
Abstract:
(EN) A wiring board (2) is provided on a heat dissipating plate (1). A semiconductor chip (8) is provided on the wiring board (2). A case housing (10) is provided on the heat dissipating plate (1) such that the case housing surrounds the wiring board (2) and the semiconductor chip (8). A lower surface of the case housing (10) and an upper surface outer peripheral section of the heat dissipating plate (1) are bonded to each other using an adhesive (11). A sealing material (13) is provided in the case housing (10), and covering the wiring board (2) and the semiconductor chip (8). Step sections (16, 17) are provided in the lower surface of the case housing (10) and/or the upper surface outer peripheral section of the heat dissipating plate (1). Each of the side surfaces of the heat dissipating plate (1) and each of the outer side surfaces of the case housing (10) are on a same plane.
(FR) Une carte de câblage (2) est disposée sur une plaque de dissipation de chaleur (1). Une puce à semi-conducteur (8) est disposée sur la carte de câblage (2). Un boîtier de logement (10) est disposé sur la plaque de dissipation de chaleur (1) de telle sorte que le boîtier de logement entoure la carte de câblage (2) et la puce semi-conductrice (8). Une surface inférieure du boîtier de logement (10) et une section périphérique externe de surface supérieure de la plaque de dissipation de chaleur (1) sont liées l'une à l'autre à l'aide d'un adhésif (11). Un matériau d'étanchéité (13) est disposé dans le boîtier de logement (10), et recouvre la carte de câblage (2) et la puce semi-conductrice (8). Des sections étagées (16, 17) sont disposées au niveau de la surface inférieure du boîtier de logement (10) et/ou la section périphérique externe de surface supérieure de la plaque de dissipation de chaleur (1). Chacune des surfaces latérales de la plaque de dissipation de chaleur (1) et chacune des surfaces latérales externes du boîtier de logement (10) sont sur un même plan.
(JA) 放熱板(1)上に配線基板(2)が設けられている。配線基板(2)上に半導体チップ(8)が設けられている。配線基板(2)及び半導体チップ(8)を囲うように放熱板(1)上にケース筐体(10)が設けられている。ケース筐体(10)の下面と放熱板(1)の上面外周部が接着剤(11)により接着されている。封止材(13)がケース筐体(10)内に設けられ、配線基板(2)及び半導体チップ(8)を覆っている。ケース筐体(10)の下面と放熱板(1)の上面外周部の少なくとも一方に段差部(16,17)が設けられている。放熱板(1)の側面とケース筐体(10)の外側面が同一面である。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)