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1. (WO2018051412) SEMICONDUCTOR DEVICE

Pub. No.:    WO/2018/051412    International Application No.:    PCT/JP2016/076978
Publication Date: Fri Mar 23 00:59:59 CET 2018 International Filing Date: Wed Sep 14 01:59:59 CEST 2016
IPC: H01L 27/08
H01L 21/336
H01L 29/06
H01L 29/78
Applicants: MITSUBISHI ELECTRIC CORPORATION
三菱電機株式会社
Inventors: YOSHINO, Manabu
吉野 学
Title: SEMICONDUCTOR DEVICE
Abstract:
A RESURF isolation structure surrounds the outer periphery of a high side circuit region and isolates the high side circuit region and low side circuit region. The RESURF isolation structure comprises a high breakdown voltage isolation region, a high breakdown voltage NchMOS and a high breakdown voltage PchMOS. The high breakdown voltage isolation region, high breakdown voltage NchMOS and high breakdown voltage PchMOS have multiple field plates (9, 19a, 19b, 19c). The inner end of the field plate (19c) furthest towards the low side circuit region in the high breakdown voltage PchMOS is positioned more towards the low side circuit region than the inner end of the field plate (19b) furthest towards the low side circuit region in the high breakdown voltage NchMOS.