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Machine translation
1. (WO2018049386) ACCURATE, FINELY TUNABLE ELECTRONIC DELAY GENERATION WITH HIGH PROCESS VARIATION TOLERANCE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/049386 International Application No.: PCT/US2017/051142
Publication Date: 15.03.2018 International Filing Date: 12.09.2017
IPC:
H03L 7/08 (2006.01) ,H03L 7/083 (2006.01) ,H03L 7/087 (2006.01) ,H03L 7/24 (2006.01)
Applicants: CALIFORNIA INSTITUTE OF TECHNOLOGY[US/US]; 1200 East California Boulevard Pasadena, California 91125, US
Inventors: ABIRI, Behrooz; US
HAJIMIRI, Seyed Ali; US
Agent: KORSH, George; US
TABIBI, Ardeshir; US
BRIAN OLION; ALSTON & BIRD LLP Bank of America Plaza 101 South Tryon Street, Suite 4000 Charlotte, North Carolina 28280-4000, US
SHU, Emily; US
ZOTTOLA, Dana; US
Priority Data:
15/701,98112.09.2017US
62/393,50012.09.2016US
Title (EN) ACCURATE, FINELY TUNABLE ELECTRONIC DELAY GENERATION WITH HIGH PROCESS VARIATION TOLERANCE
(FR) GÉNÉRATION DE RETARD ÉLECTRONIQUE PRÉCIS ET À AJUSTEMENT FIN AVEC TOLÉRANCE ÉLEVÉE DE VARIATION DE PROCESSUS
Abstract: front page image
(EN) A delay generation circuit includes a modulator and a delay-locked loop. The delay-locked loop includes a delay line configured to be responsive to a phase difference between a first clock signal and one of a multitude of output signals of the delay line. The delay generation circuit is configured to select one of the multitude of output signals of the delay line in response to the modulator.
(FR) Un circuit de génération de retard comprend un modulateur et une boucle à verrouillage de retard bloqué. La boucle à verrouillage de retard comprend une ligne de retard configurée pour réagir à une différence de phase entre un premier signal d'horloge et l'un d'une multitude de signaux de sortie de la ligne de retard. Le circuit de génération de retard est configuré pour sélectionner un signal parmi la multitude de signaux de sortie de la ligne de retard en réponse au modulateur.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)