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1. (WO2018045612) METHOD FOR MANUFACTURING OXIDE THIN FILM TRANSISTOR
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/045612 International Application No.: PCT/CN2016/101523
Publication Date: 15.03.2018 International Filing Date: 09.10.2016
IPC:
H01L 29/786 (2006.01) ,H01L 21/336 (2006.01) ,H01L 21/02 (2006.01) ,H01L 21/3105 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105
After-treatment
Applicants: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD[CN/CN]; Building C5, Biolake of Optics Valley, No.666 Gaoxin Avenue Wuhan East Lake High-Tech Development Zone Wuhan, Hubei 430070, CN
Inventors: XIE, Yingtao; CN
Agent: MING & YUE INTELLECTUAL PROPERTY LAW FIRM; Room 604 Building 2, Oceanwide City Square, Qianhai Road, Nanshan Street, Nanshan District Shenzhen, Guangdong 518066, CN
Priority Data:
201610808802.408.09.2016CN
Title (EN) METHOD FOR MANUFACTURING OXIDE THIN FILM TRANSISTOR
(FR) PROCÉDÉ DE FABRICATION D'UN TRANSISTOR À COUCHES MINCES D'OXYDE
(ZH) 氧化物薄膜晶体管的制备方法
Abstract:
(EN) Provided is a method for manufacturing an oxide thin film transistor, comprising: providing a substrate and manufacturing an oxide semiconductor active layer on the substrate; depositing an insulating dielectric layer on the active layer; and annealing a structural member formed after the insulating dielectric layer is deposited. By means of the process of annealing a structural member that is formed after an insulating dielectric layer is deposited on an oxide semiconductor active layer, the present invention reduces a performance difference of devices caused by different film forming processes during manufacturing of insulating dielectric layers, and improves the repeatability of the film forming process.
(FR) L'invention concerne un procédé de fabrication d'un transistor à couches minces d'oxyde, consistant à : utiliser un substrat et fabriquer une couche active semi-conductrice d'oxyde sur le substrat ; déposer une couche diélectrique isolante sur la couche active ; et recuire un élément structural formé après que la couche diélectrique isolante a été déposée. Au moyen du procédé de recuit d'un élément structural qui est formé après qu'une couche diélectrique isolante a été déposée sur une couche active semi-conductrice d'oxyde, la présente invention réduit une différence de performance de dispositifs provoquée par différents processus de formation de film pendant la fabrication de couches diélectriques isolantes, et améliore la reproductibilité du processus de formation de film.
(ZH) 提供了一种氧化物薄膜晶体管的制备方法,包括:提供一基底并在基底上制备形成氧化物半导体有源层;在所述有源层上沉积绝缘介质层;将沉积绝缘介质层后形成的结构件进行退火处理。本发明在氧化物半导体有源层上沉积完成绝缘介质层之后,即对所形成的结构件增加进行退火处理的工艺,降低了在制备绝缘介质层时因不同的成膜工艺所带来的器件性能差异,提高了成膜工艺的可重复性。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)