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1. (WO2018045298) LOW CAPACITANCE SWITCH FOR PGA OR PGIA
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/045298 International Application No.: PCT/US2017/049876
Publication Date: 08.03.2018 International Filing Date: 01.09.2017
IPC:
H01L 29/772 (2006.01) ,H01L 21/76 (2006.01) ,H01L 29/08 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
08
with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
Applicants:
ANALOG DEVICES, INC. [US/US]; One Technology Way Norwood, Massachusetts 02062, US
Inventors:
HERRERA, Sandro; US
JEFFERY, Alan K.; US
Agent:
ARORA, Suneel; US
WOO, Justin N., Reg. No. 62,686; US
BLACK, David W., Reg. No. 42,331; US
GOULD, James R., Reg. No. 72,086; US
BEEKMAN, Marvin L., Reg. No. 38,377; US
BIANCHI, Timothy E., Reg. No. 39,610; US
MCCRACKIN, Ann M., Reg. No. 42,858; US
PERDOK, Monique M., Reg. No. 42,989; US
SCHEER, Bradley W., Reg. No. 47,059; US
Priority Data:
15/254,69601.09.2016US
15/254,78201.09.2016US
Title (EN) LOW CAPACITANCE SWITCH FOR PGA OR PGIA
(FR) COMMUTATEUR À FAIBLE CAPACITÉ POUR PGA OU PGIA
Abstract:
(EN) A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET), such as by an insulator, can be coupled to or driven to a voltage similar to the input voltage or other desired bias voltage (e.g., an operational amplifier output) to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can help provide improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
(FR) L'invention concerne un circuit de commutation analogique à canal n à faible capacité, un circuit de commutation analogique à canal p, et un circuit de grille de transmission entièrement CMOS (grille T). Un découplage résistif peut être utilisé pour isoler le commutateur ou la grille en T par rapport à des masses de courant alternatif. Une région semi-conductrice qui est séparée d'une région de corps d'un transistor à effet de champ de passage (FET), par exemple par un isolateur, peut être couplée ou actionnée à une tension similaire à la tension d'entrée ou à une autre tension de polarisation souhaitée (par exemple, une sortie d'amplificateur fonctionnelle) pour mieux réduire la capacité parasite du commutateur ou de la grille T. Le commutateur ou la grille T permettent d'améliorer une largeur de bande de fréquence ou une réponse en fréquence. Le commutateur peut être utile dans un amplificateur de gain programmable (PGA) ou un amplificateur d'instrumentation de gain programmable (PGIA), ou un autre circuit dans lequel une capacité de commutation excessive pourrait dégrader les performances du circuit.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)