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1. (WO2018044909) PARALLEL MICROPOLYGON RASTERIZERS
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Pub. No.: WO/2018/044909 International Application No.: PCT/US2017/049151
Publication Date: 08.03.2018 International Filing Date: 29.08.2017
IPC:
G06T 1/20 (2006.01) ,G06T 1/60 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
T
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
1
General purpose image data processing
20
Processor architectures; Processor configuration, e.g. pipelining
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
T
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
1
General purpose image data processing
60
Memory management
Applicants:
ADVANCED MICRO DEVICES, INC. [US/US]; 2485 Augustine Drive Santa Clara, CA 95054, US
Inventors:
PROKOPENKO, Boris; US
PALTASHEV, Timour T.; US
KIBARDIN, Vladimir V.; US
Agent:
DAVIDSON, Ryan S.; US
Priority Data:
15/251,91430.08.2016US
Title (EN) PARALLEL MICROPOLYGON RASTERIZERS
(FR) RASTÉRISEURS À MICROPOLYGONE PARALLÈLES
Abstract:
(EN) A parallel adaptable graphics rasterization system (100) includes a primitive assembler (135, 315, 515) with a router (520) to selectively route a primitive (700, 800) to a first rasterizer (155, 350, 410, 525) or one of a plurality of second rasterizers (355, 405, 540, 605). The second rasterizers concurrently operate on different primitives and the primitive is selectively routed based on an area of the primitive. In some variations, a bounding box (215, 705, 805) of the primitive is reduced to a predetermined number of pixels prior to providing the primitive to the one of the plurality of second rasterizers. Reducing the bounding box includes, for example, subtracting an origin of the bounding box from coordinates of points that represent the primitive.
(FR) L'invention concerne un système de tramage graphique adaptable parallèle (100) comprenant un assembleur de primitives (135, 315, 515) avec un routeur (520) pour router sélectivement une primitive (700, 800) vers un premier rastériseur (155, 350, 410, 525) ou un rastériseur parmi une pluralité de seconds rastériseurs (355, 405, 540, 605). Les seconds rastériseurs fonctionnent simultanément sur différentes primitives et la primitive est sélectivement routée sur la base d'une zone de la primitive. Dans certaines variantes, une boîte de délimitation (215, 705, 805) de la primitive est réduite à un nombre prédéfini de pixels avant de fournir la primitive à un rastériseur parmi la pluralité de seconds rastériseurs. La réduction de la boîte de délimitation comprend, par exemple, la soustraction, depuis des coordonnées de points qui représentent la primitive, d'une origine de la boîte de délimitation.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)