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1. (WO2018044519) APPARATUS AND METHOD FOR IN SITU ANALOG SIGNAL DIAGNOSTIC AND DEBUGGING WITH CALIBRATED ANALOG-TO-DIGITAL CONVERTER
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Pub. No.: WO/2018/044519 International Application No.: PCT/US2017/046111
Publication Date: 08.03.2018 International Filing Date: 09.08.2017
Chapter 2 Demand Filed: 30.04.2018
IPC:
G01R 31/316 (2006.01) ,H03M 1/10 (2006.01) ,H03M 1/12 (2006.01) ,G01R 31/3167 (2006.01)
G PHYSICS
01
MEASURING; TESTING
R
MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28
Testing of electronic circuits, e.g. by signal tracer
316
Testing of analog circuits
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
1
Analogue/digital conversion; Digital/analogue conversion
10
Calibration or testing
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
1
Analogue/digital conversion; Digital/analogue conversion
12
Analogue/digital converters
G PHYSICS
01
MEASURING; TESTING
R
MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28
Testing of electronic circuits, e.g. by signal tracer
3167
Testing of combined analog and digital circuits
Applicants:
QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
SONG, Deqiang; US
KONG, Xiaohua; US
PANDITA, Bupesh; US
GAO, Zhuo; US
Agent:
FOUNTAIN, George; US
Priority Data:
15/251,86130.08.2016US
Title (EN) APPARATUS AND METHOD FOR IN SITU ANALOG SIGNAL DIAGNOSTIC AND DEBUGGING WITH CALIBRATED ANALOG-TO-DIGITAL CONVERTER
(FR) APPAREIL ET PROCÉDÉ DESTINÉS AU DÉBOGAGE ET AU DIAGNOSTIC DE SIGNAL ANALOGIQUE IN SITU COMPRENANT UN CONVERTISSEUR ANALOGIQUE-NUMÉRIQUE ÉTALONNÉ
Abstract:
(EN) An integrated circuit (IC) chip includes an on-chip analog signal monitoring circuit for monitoring a set of analog signals generated by one or more mixed signal cores within the IC chip, converting the analog signals into digital signals, storing the digital signals in an on-chip memory, and providing the digital signals to a test equipment upon request. The analog signal monitoring signal includes an on-chip reference generator for generating precise voltages and/or currents, a switching network for routing a selected reference signal to an analog-to-digital converter (ADC) for calibration purpose and for routing a selected analog signal from one of the mixed signal cores to the ADC for digitizing purposes. The IC chip further includes an on-chip memory for storing the digitized analog signals for subsequent accessing by a test equipment for analysis. The IC chip includes a digital analog test point (ATP) for outputting the digitized analog signals.
(FR) La présente invention concerne une puce de circuit intégré (IC) qui comporte un circuit de surveillance de signal analogique sur puce pour surveiller un ensemble de signaux analogiques générés par au moins un cœur de signal mélangé à l'intérieur de la puce CI, convertir les signaux analogiques en signaux numériques, stocker les signaux numériques dans une mémoire sur puce, et fournir les signaux numériques à un équipement de test suite à la demande. Le signal de surveillance de signal analogique comporte un générateur de référence sur puce pour générer des courants et/ou des tensions précises, un réseau de commutation pour acheminer un signal de référence sélectionné à un convertisseur analogique-numérique (ADC) à des fins d'étalonnage et pour acheminer un signal analogique sélectionné à partir de l'un des cœurs de signal mélangés vers l'ADC à des fins de numérisation. La puce IC comporte en outre une mémoire sur puce pour stocker les signaux analogiques numérisés pour un accès ultérieur par un équipement d'essai pour analyse. La puce IC comporte un point de test analogique numérique (ATP) pour délivrer les signaux analogiques numérisés.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)