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1. (WO2018043425) SEMICONDUCTOR DEVICE
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Pub. No.: WO/2018/043425 International Application No.: PCT/JP2017/030781
Publication Date: 08.03.2018 International Filing Date: 28.08.2017
IPC:
H01L 27/10 (2006.01) ,G11C 17/06 (2006.01) ,H01L 29/786 (2006.01) ,H01L 45/00 (2006.01) ,H01L 49/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
17
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
06
using diode elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45
Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49
Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
Applicants:
シャープ株式会社 SHARP KABUSHIKI KAISHA [JP/JP]; 大阪府堺市堺区匠町1番地 1, Takumi-cho, Sakai-ku, Sakai City, Osaka 5908522, JP
Inventors:
山本 薫 YAMAMOTO Kaoru; --
Agent:
奥田 誠司 OKUDA Seiji; JP
Priority Data:
2016-17302405.09.2016JP
Title (EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEURS
(JA) 半導体装置
Abstract:
(EN) A semiconductor device having a plurality of memory cells (MC1, MC2), the semiconductor device being such that each of the plurality of memory cells (MC1, MC2) respectively has: a memory transistor (10M) having an oxide semiconductor layer (17M) as an active layer; and a first selection transistor (10S) having a crystalline silicon layer (13S) as the active layer, and connected in series to the memory transistor (10M).
(FR) Un dispositif à semi-conducteur ayant une pluralité de cellules de mémoire (MC1, MC2), le dispositif à semi-conducteur étant tel que chacune de la pluralité de cellules de mémoire (MC1, MC2) comporte respectivement : un transistor de mémoire (10M) ayant une couche semi-conductrice d'oxyde (17M) en tant que couche active; et un premier transistor de sélection (10S) ayant une couche de silicium cristallin (13S) en tant que couche active, et connecté en série au transistor de mémoire (10M).
(JA) 半導体装置は、複数のメモリセル(MC1、MC2)を有する半導体装置であって、複数のメモリセル(MC1、MC2)のそれぞれは、活性層として酸化物半導体層(17M)を有するメモリトランジスタ(10M)と、活性層として結晶質シリコン層(13S)を有し、メモリトランジスタ(10M)に直列に接続された第1選択トランジスタ(10S)とを有する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)