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1. (WO2018043184) THROUGH ELECTRODE SUBSTRATE, METHOD FOR PRODUCING THROUGH ELECTRODE SUBSTRATE AND MOUNTED BOARD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/043184 International Application No.: PCT/JP2017/029819
Publication Date: 08.03.2018 International Filing Date: 21.08.2017
IPC:
H05K 1/11 (2006.01) ,H01L 21/3205 (2006.01) ,H01L 21/768 (2006.01) ,H01L 23/12 (2006.01) ,H01L 23/522 (2006.01) ,H05K 3/40 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
11
Printed elements for providing electric connections to or between printed circuits
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
768
Applying interconnections to be used for carrying current between separate components within a device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
40
Forming printed elements for providing electric connections to or between printed circuits
Applicants: DAI NIPPON PRINTING CO., LTD.[JP/JP]; 1-1, Ichigaya-kaga-cho 1-chome, Shinjuku-ku, Tokyo 1628001, JP
Inventors: MAEKAWA Shinji; JP
KUDO Hiroshi; JP
TAKANO Takamasa; JP
MAWATARI Hiroshi; JP
ASANO Masaaki; JP
Agent: NAGAI Hiroshi; JP
NAKAMURA Yukitaka; JP
SATO Yasukazu; JP
ASAKURA Satoru; JP
HOTTA Yukihiro; JP
OKAMURA Kazuro; JP
Priority Data:
2016-17001531.08.2016JP
Title (EN) THROUGH ELECTRODE SUBSTRATE, METHOD FOR PRODUCING THROUGH ELECTRODE SUBSTRATE AND MOUNTED BOARD
(FR) SUBSTRAT D’ÉLECTRODE TRAVERSANTE, PROCÉDÉ DE PRODUCTION DE SUBSTRAT D’ÉLECTRODE TRAVERSANTE ET CARTE MONTÉE
(JA) 貫通電極基板、貫通電極基板の製造方法及び実装基板
Abstract:
(EN) This through electrode substrate is provided with: a substrate which has a first surface positioned on a first side and a second surface positioned on a second side that is opposite to the first side, while being provided with a through hole; and a through electrode. The through electrode has: a lateral wall portion which extends along the lateral wall of the through hole; and a first portion which is positioned on the first surface of the substrate and is connected to the lateral wall portion. This through electrode substrate is additionally provided with: an organic film which is positioned inside the through hole; an inorganic film which at least partially covers the first portion of the through electrode from the first side, while being provided with an opening that is positioned above the first portion; and a first wiring layer which comprises an insulating layer that is positioned closer to the first side than the inorganic film and contains at least an organic layer having an opening that is in communication with the opening of the inorganic film and a conductive layer that is connected to the first portion of the through electrode via the opening of the inorganic film and the opening of the insulating layer.
(FR) La présente invention concerne un substrat d’électrode traversante qui comporte : un substrat qui a une première surface positionnée sur une première face et une deuxième surface positionnée sur une deuxième face qui est opposée à la première face, tout en comportant un trou traversant ; et une électrode traversante. L’électrode traversante a : une partie de paroi latérale qui s’étend le long de la paroi latérale du trou traversant ; et une première partie qui est positionnée sur la première surface du substrat et qui est connectée à la partie de paroi latérale. Ce substrat d’électrode traversante comporte par ailleurs : une pellicule organique qui est positionnée à l’intérieur du trou traversant ; une pellicule inorganique qui recouvre au moins partiellement la première partie de l’électrode traversante depuis le premier côté, tout en comportant une ouverture qui est positionnée au-dessus de la première partie ; et une première couche de câblage qui comprend une couche isolante qui est positionnée plus près du premier côté que la pellicule inorganique et qui contient au moins une couche organique ayant une ouverture qui est en communication avec l’ouverture de la pellicule inorganique et une couche conductrice qui est connectée à la première partie de l’électrode traversante à travers l’ouverture de la pellicule inorganique et l’ouverture de la couche isolante.
(JA) 貫通電極基板は、第1側に位置する第1面及び第1側とは反対の第2側に位置する第2面を含むとともに貫通孔が設けられた基板と、貫通電極とを備える。貫通電極は、貫通孔の側壁に沿って広がる側壁部分と、基板の第1面上に位置するとともに側壁部分に接続された第1部分と、を有する。また、貫通電極基板は、貫通孔の内部に位置する有機膜と、貫通電極の第1部分を第1側から少なくとも部分的に覆うとともに、第1部分上に位置する開口が設けられた無機膜と、無機膜よりも第1側に位置し、無機膜の開口に連通する開口が設けられた有機層を少なくとも含む絶縁層と、無機膜の開口及び絶縁層の開口を介して貫通電極の第1部分に接続された導電層と、を有する第1配線層と、を更に備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)