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1. (WO2018042402) SOFTWARE-DEFINED DEVICE INTERFACE SYSTEM AND METHOD
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Pub. No.: WO/2018/042402 International Application No.: PCT/IB2017/055324
Publication Date: 08.03.2018 International Filing Date: 05.09.2017
IPC:
G06F 1/08 (2006.01) ,G06F 3/038 (2013.01) ,G06F 5/16 (2006.01) ,G06F 9/455 (2006.01) ,G06F 21/76 (2013.01) ,G06F 21/85 (2013.01) ,H04L 29/06 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
04
Generating or distributing clock signals or signals derived directly therefrom
08
Clock generators with changeable or programmable clock frequency
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
01
Input arrangements or combined input and output arrangements for interaction between user and computer
03
Arrangements for converting the position or the displacement of a member into a coded form
033
Pointing devices displaced or positioned by the user; Accessories therefor
038
Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
5
Methods or arrangements for data conversion without changing the order or content of the data handled
06
for changing the speed of data flow, i.e. speed regularising
16
Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
44
Arrangements for executing specific programmes
455
Emulation; Software simulation
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
21
Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70
Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71
to assure secure computing or processing of information
76
in application-specific integrated circuits [ASICs] or field-programmable devices, e.g. field-programmable gate arrays [FPGAs] or programmable logic devices [PLDs]
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
21
Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70
Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
82
Protecting input, output or interconnection devices
85
interconnection devices, e.g. bus-connected or in-line devices
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
29
Arrangements, apparatus, circuits or systems, not covered by a single one of groups H04L1/-H04L27/136
02
Communication control; Communication processing
06
characterised by a protocol
Applicants:
IOT.NXT (PTY) LTD [ZA/ZA]; Alexandra Road, Bylsbridge Office Park Building No. 14, First Floor Highveld 0157 Centurion, ZA
Inventors:
JACOBS, Gysbert Johannes; ZA
DU TOIT, Rudi Deodat; ZA
Agent:
VON SEIDELS; P.O. Box 440 Century City (Cape Town) 7446, ZA
ABRAMSON, Lance; ZA
BEHARIE, Tertia; ZA
BIAGIO, Dina; ZA
BROWN, Keith Edwin Frank; ZA
CILLIERS, Lodewyk Petrus; ZA
COCHRANE, David Hylton; ZA
GILSON, David Grant; ZA
GRANT, Tyron James; ZA
HANEKOM, Dirk Christiaan; ZA
KAHN, Craig; ZA
KEMP, Mark; ZA
MAHOMED, Shanaaz; ZA
MCKNIGHT, John Crawford; ZA
MOUBRAY, Hugh Robert; ZA
PIENAAR, Danie; ZA
VAN SCHALKWYK, Herman; ZA
WHITTAKER, Jonathan Denis; ZA
Priority Data:
2016/0612005.09.2016ZA
Title (EN) SOFTWARE-DEFINED DEVICE INTERFACE SYSTEM AND METHOD
(FR) SYSTÈME ET PROCÉDÉ D'INTERFACE DE DISPOSITIF DÉFINIE PAR UN LOGICIEL
Abstract:
(EN) The invention relates to a software defined device interface system 10, a software defined device interface, gateway and a method of defining an interface for a device which uses a specific communication protocol for communication purposes. The system 10 includes a microprocessor/processing unit 12.1, 12.2 with a plurality of communication pins and software/firmware. The software/firmware is configured, based on a specific communication protocol which is used by a particular device 30.1-30.4 for communication purposes, to, in runtime, assign/select one or more of the communication pins to form a virtual port to which the particular device 30.1-30.4 can be connected, upon receiving a configuration instruction from a user to implement the specific communication protocol. The software/firmware is further configured to implement the specific communication protocol through the virtual port, to thereby allow for communication between the microprocessor/processing unit 12.1, 12.2 and the device 30.1-30.4, when the device 30.1-30.4 is connected to the pin(s) of the virtual port.
(FR) L'invention concerne un système d'interface de dispositif définie par un logiciel (10), une interface de dispositif définie par un logiciel, une passerelle et un procédé de définition d'une interface de dispositif qui utilise un protocole de communication spécifique à des fins de communication. Le système (10) comprend un microprocesseur/une unité de traitement (12.1, 12.2) comportant une pluralité de broches de communication et un logiciel/micrologiciel. Le logiciel/micrologiciel est conçu pour, lors d'une exécution, attribuer/sélectionner, sur la base d'un protocole de communication spécifique qui est utilisé par un dispositif particulier (30.1-30.4) à des fins de communication, une ou plusieurs des broches de communication de façon à former un port virtuel auquel le dispositif particulier (30.1-30.4) peut être connecté lorsqu'il reçoit une instruction de configuration provenant d'un utilisateur et visant à appliquer le protocole de communication spécifique. Le logiciel/micrologiciel est en outre conçu pour appliquer le protocole de communication spécifique par l'intermédiaire du port virtuel, ce qui permet une communication entre le microprocesseur/l'unité de traitement (12.1, 12.2) et le dispositif (30.1-30.4) lorsque ce dernier est connecté auxdites une ou plusieurs broches du port virtuel.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)