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1. (WO2018038856) DYNAMICALLY DETERMINING MEMORY ATTRIBUTES IN PROCESSOR-BASED SYSTEMS
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/038856 International Application No.: PCT/US2017/043903
Publication Date: 01.03.2018 International Filing Date: 26.07.2017
Chapter 2 Demand Filed: 18.06.2018
IPC:
G06F 12/02 (2006.01) ,G06F 12/06 (2006.01) ,G06F 12/0804 (2016.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
06
Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
[IPC code unknown for G06F 12/0804]
Applicants: QUALCOMM INCORPORATED[US/US]; Attn: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors: SPEIER, Thomas, Philip; US
Agent: TERRANOVA, Steven, N.; US
OWENS, JR., Bruce E.; US
OWENS, Bruce, E., Jr.; Withrow & Terranova, PLLC 106 Pinedale Springs Way Cary, North Carolina 27511, US
Priority Data:
15/637,29029.06.2017US
62/379,95226.08.2016US
Title (EN) DYNAMICALLY DETERMINING MEMORY ATTRIBUTES IN PROCESSOR-BASED SYSTEMS
(FR) DÉTERMINATION DYNAMIQUE D'ATTRIBUTS DE MÉMOIRE DANS DES SYSTÈMES BASÉS SUR UN PROCESSEUR
Abstract:
(EN) Providing dynamic determination of memory attributes in processor-based systems is disclosed. In this regard, in some aspects, a processor-based system comprises a processor device and one or more memory devices, each of which is associated with one of a plurality of memory attributes. The processor device transmits a request to one of the memory devices to determine the memory attribute associated with the memory device. In response to the request, the memory device provides a memory attribute indication that informs the processor device of the memory attribute associated with the memory device. The processor device in some aspects then performs subsequent memory access operations on the memory device based on the memory attribute indication. Some aspects may provide that the processor device also stores the memory attribute indication, and performs subsequent memory access operations based on the stored memory attribute indication.
(FR) L'invention concerne la fourniture d'une détermination dynamique d'attributs de mémoire dans des systèmes basés sur un processeur. À cet égard, selon certains aspects, un système basé sur un processeur comprend un dispositif de processeur et un ou plusieurs dispositifs de mémoire, dont chacun est associé à un attribut de mémoire d'une pluralité d'attributs de mémoire. Le dispositif de processeur transmet une demande à l'un des dispositifs de mémoire pour déterminer l'attribut de mémoire associé au dispositif de mémoire. En réponse à la demande, le dispositif de mémoire fournit une indication d'attribut de mémoire qui informe le dispositif de processeur de l'attribut de mémoire associé au dispositif de mémoire. Selon certains aspects, le dispositif de processeur effectue ensuite des opérations d'accès mémoire ultérieur sur le dispositif de mémoire en se basant sur l'indication d'attribut de mémoire. Certains aspects peuvent permettre au dispositif de processeur de stocker également l'indication d'attribut de mémoire et d'effectuer des opérations d'accès mémoire ultérieur en se basant sur l'indication d'attribut de mémoire stockée.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)