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1. (WO2018038802) ADAPTIVE POWER REGULATION METHODS AND SYSTEMS
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Pub. No.: WO/2018/038802 International Application No.: PCT/US2017/039388
Publication Date: 01.03.2018 International Filing Date: 27.06.2017
Chapter 2 Demand Filed: 11.07.2018
IPC:
G06F 1/32 (2006.01) ,G11C 5/14 (2006.01) ,G11C 29/04 (2006.01) ,G11C 29/02 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
26
Power supply means, e.g. regulation thereof
32
Means for saving power
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
14
Power supply arrangements
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
04
Detection or location of defective memory elements
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
02
Detection or location of defective auxiliary circuits, e.g. defective refresh counters
Applicants:
QUALCOMM INCORPORATED [US/US]; Attn: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
SAMSON, Giby; US
BOWMAN, Keith, Alan; US
PU, Yu; US
ATALLAH, Francois, Ibrahim; US
Agent:
DAVENPORT, Taylor, M.; US
Priority Data:
15/245,72524.08.2016US
Title (EN) ADAPTIVE POWER REGULATION METHODS AND SYSTEMS
(FR) PROCÉDÉS ET SYSTÈMES DE RÉGULATION ADAPTATIVE D'ALIMENTATION
Abstract:
(EN) Adaptive power regulation methods and systems are disclosed. In one aspect, one or more process sensors for memory elements are provided, which report information relating to inherent speed characteristics of sub-elements within the memory elements. Based on this reported information, a controller ascertains an appropriate power level to insure a proper data retention voltage (DRV) is applied on voltage rails by a power management unit (PMU) circuit. By using the proper DRV based on the speed characteristics of the sub-elements within the memory elements, power conservation is achieved.
(FR) Cette invention concerne des procédés et des systèmes de régulation adaptative d'alimentation. Selon un aspect, un système selon l'invention comprend un ou plusieurs capteurs de processus pour des éléments de mémoire, qui rapportent des informations relatives à des caractéristiques de vitesse inhérente de sous-éléments à l'intérieur des éléments de mémoire. Sur la base de ces informations rapportées, un dispositif de commande détermine un niveau d'alimentation approprié pour garantir qu'une tension de conservation de données appropriée (DRV) est appliquée sur des rails de tension par un circuit d'unité de gestion d'alimentation (PMU). En utilisant la tension de conservation de données appropriée sur la base des caractéristiques de vitesse des sous-éléments à l'intérieur des éléments de mémoire, une économie d'énergie est obtenue.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)