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1. (WO2018037688) SIGNAL AMPLIFICATION DEVICE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/037688 International Application No.: PCT/JP2017/022641
Publication Date: 01.03.2018 International Filing Date: 20.06.2017
IPC:
H03G 3/10 (2006.01) ,H03G 3/12 (2006.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
G
CONTROL OF AMPLIFICATION
3
Gain control in amplifiers or frequency changers
02
Manually-operated control
04
in untuned amplifiers
10
having semiconductor devices
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
G
CONTROL OF AMPLIFICATION
3
Gain control in amplifiers or frequency changers
02
Manually-operated control
04
in untuned amplifiers
10
having semiconductor devices
12
incorporating negative feedback
Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION[JP/JP]; 4-14-1 Asahi-cho, Atsugi-shi, Kanagawa 2430014, JP
Inventors: JINGU, Yoshikatsu; JP
Agent: MARUSHIMA, Toshikazu; JP
Priority Data:
2016-16259023.08.2016JP
Title (EN) SIGNAL AMPLIFICATION DEVICE
(FR) DISPOSITIF D'AMPLIFICATION DE SIGNAL
(JA) 信号増幅装置
Abstract:
(EN) The present invention guarantees the continuity of the gain of an amplifier in a signal amplification device. A signal amplification device is provided with a main path and a sub path connected in parallel with the main path. A main path first amplification circuit amplifies an input signal on the main path. A main path second amplification circuit is provided with a grounded-gate transistor connected in series with an output of the main path first amplification circuit without sharing a direct current therewith. A sub path amplification circuit amplifies the input signal by a gain lower than a maximum gain in the main path on the main and sub paths.
(FR) La présente invention garantit la continuité du gain d'un amplificateur dans un dispositif d'amplification de signal. Un dispositif d'amplification de signal est pourvu d'un trajet principal et d'un sous-trajet connecté en parallèle au trajet principal. Un premier circuit d'amplification de trajet principal amplifie un signal d'entrée sur le trajet principal. Un second circuit d'amplification de trajet principal est pourvu d'un transistor de grille mis à la terre connecté en série à une sortie du premier circuit d'amplification de trajet principal sans partager un courant continu avec ce dernier. Un circuit d'amplification de trajet secondaire amplifie le signal d'entrée au moyen d'un gain inférieur à un gain maximal dans le trajet principal sur les trajets principal et secondaire.
(JA) 信号増幅装置において、増幅器の利得の連続性を担保する。 信号増幅装置は、主経路とその主経路に並列に接続される副経路とを備える。主経路第1増幅回路は、主経路上において入力信号の増幅を行う。主経路第2増幅回路は、直流電流を共有することなく主経路第1増幅回路の出力に直列接続されるゲート接地トランジスタを備える。副経路増幅回路は、主副経路上において、主経路における最大利得よりも低い利得により入力信号の増幅を行う。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)