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1. (WO2018037530) SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2018/037530 International Application No.: PCT/JP2016/074818
Publication Date: 01.03.2018 International Filing Date: 25.08.2016
IPC:
H01L 21/336 (2006.01) ,H01L 21/28 (2006.01) ,H01L 21/316 (2006.01) ,H01L 21/318 (2006.01) ,H01L 21/338 (2006.01) ,H01L 29/423 (2006.01) ,H01L 29/49 (2006.01) ,H01L 29/778 (2006.01) ,H01L 29/78 (2006.01) ,H01L 29/812 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
316
composed of oxides or glassy oxides or oxide-based glass
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
318
composed of nitrides
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
338
with a Schottky gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
423
not carrying the current to be rectified, amplified or switched
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
43
characterised by the materials of which they are formed
49
Metal-insulator semiconductor electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
778
with two-dimensional charge carrier gas channel, e.g. HEMT
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
80
with field effect produced by a PN or other rectifying junction gate
812
with a Schottky gate
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
南條 拓真 NANJO Takuma; JP
林田 哲郎 HAYASHIDA Tetsuro; JP
古川 彰彦 FURUKAWA Akihiko; JP
Agent:
吉竹 英俊 YOSHITAKE Hidetoshi; JP
有田 貴弘 ARITA Takahiro; JP
Priority Data:
Title (EN) SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET SON PROCÉDÉ DE PRODUCTION
(JA) 半導体装置およびその製造方法
Abstract:
(EN) The objective of the invention is to provide a technique allowing a sufficiently large drain current to be obtained for a semiconductor device in normally-OFF operation. This semiconductor device comprises: a channel layer 3a containing Alx1Iny1Ga1-x1-y1N (0 ≤ x1 ≤ 1, 0 ≤ y1 ≤ 1); a source electrode 5 and a drain electrode 6 formed in such a manner as to be separated from one another on the surface side of the channel layer 3a; high-concentration n-type impurity regions 7, 8 formed in such a manner as to be separated from one another and oriented from the surface of the channel layer 3a to the interior of the channel layer 3, at least in the portions that are under the source electrode 5 and the drain electrode 6, respectively; a gate insulation film layer 9a formed in such a manner as to cover the surface of the channel layer 3a between the high-concentration n-type impurity regions 7, 8; and a gate electrode 10 formed on the surface of the gate insulation film layer 9a. During the ON state, the current density between the source electrode 5 and the drain electrode 6 is 10 mA/mm or higher.
(FR) L'objectif de l'invention est de fournir une technique permettant d'obtenir un courant de drain suffisamment grand pour un dispositif à semi-conducteur dans un fonctionnement normalement BLOQUÉ. Le dispositif à semi-conducteur selon l'invention comprend : une couche de canal contenant de l'Alx1Iny1Ga1-x1-y1N (0 ≤ x1 ≤ 1, 0 ≤ y1 ≤ 1); une électrode de source 5 et une électrode de drain 6 formées de manière à être séparées l'une de l'autre sur le côté de surface de la couche de canal 3a; des régions d'impuretés de type n à haute concentration 7, 8 formées de manière à être séparées l'une de l'autre et orientées à partir de la surface de la couche de canal 3a vers l'intérieur de la couche de canal 3, au moins dans les portions qui sont sous l'électrode de source 5 et l'électrode de drain 6, respectivement; une couche de film d'isolation de grille 9a formée de manière à recouvrir la surface de la couche de canal 3a entre les régions d'impuretés de type n à haute concentration 7, 8; et une électrode de grille 10 formée sur la surface de la couche de film d'isolation de grille 9a. Pendant l'état de MARCHE, la densité de courant entre l'électrode de source 5 et l'électrode de drain 6 est de 10 mA/mm ou plus.
(JA) 半導体装置において、ノーマリオフ動作にて十分に大きなドレイン電流を得ることが可能な技術を提供することを目的とする。半導体装置は、Alx1Iny1Ga1-x1-y1N(0≦x1≦1、0≦y1≦1)からなるチャネル層3aと、チャネル層3aの表面側に互いに離間して形成されたソース電極5およびドレイン電極6と、チャネル層3aの表面のうちの少なくともソース電極5およびドレイン電極6の下方部分からチャネル層3a内部に向けて互いに離間して形成された高濃度n型不純物領域7,8と、高濃度n型不純物領域7,8間におけるチャネル層3aの表面を覆うように形成されたゲート絶縁膜層9aと、ゲート絶縁膜層9aの表面に形成されたゲート電極10とを備え、オン時のソース電極5およびドレイン電極6間の電流密度が10mA/mm以上である。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)