Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018035894) PIXEL STRUCTURE AND MANUFACTURING METHOD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/035894 International Application No.: PCT/CN2016/098561
Publication Date: 01.03.2018 International Filing Date: 09.09.2016
IPC:
H01L 21/84 (2006.01) ,H01L 27/12 (2006.01) ,H01L 29/06 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
84
the substrate being other than a semiconductor body, e.g. being an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Applicants:
武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD [CN/CN]; 中国湖北省武汉市 东湖开发区高新大道666号生物城C5栋谭玉 Tan,Yu Building C5, Biolake of Optics Valley, No.666 Gaoxin Avenue Wuhan East Lake High-Tech Development Zone Wuhan, Hubei 430070, CN
Inventors:
陈永胜 CHEN, Yung sheng; CN
徐湘伦 HSU, Hsiang lun; CN
Agent:
深圳翼盛智成知识产权事务所(普通合伙) ESSEN PATENT&TRADEMARK AGENCY; 中国广东省深圳市 福田区深南大道6021号喜年中心A座1709-1711 Hailrun Complex Block A Room 1709-1711 No.6021 Shennan Blvd,Futian District ShenZhen, Guangdong 518040, CN
Priority Data:
201610708340.923.08.2016CN
Title (EN) PIXEL STRUCTURE AND MANUFACTURING METHOD
(FR) STRUCTURE DE PIXEL ET PROCÉDÉ DE FABRICATION
(ZH) 像素结构及制作方法
Abstract:
(EN) A pixel structure and manufacturing method. The pixel structure comprises: a substrate (11); an anode electrode layer (12) provided on the substrate (11); a plurality of pixel units (15) provided on the anode electrode layer (12) and arranged in a rectangular array, wherein each of the pixel units (15) comprises four sub-pixel units (151, 152, 153, 154) arranged in a rectangular array, and the emitting colours of two sub-pixel units (151, 152, 153, 154) facing each other on the adjacent side of any two adjacent pixel units (15) are the same; and a cathode electrode layer (18) provided on the plurality of pixel units (15). Therefore, when a metal photomask is used to form the plurality of pixel units (15), a mask opening can be shared by one sub-pixel unit (151, 152, 153, 154) of at least four pixel units (15), so as to improve the process capability of the metal photomask and the resolution of a display screen.
(FR) L'invention concerne une structure de pixel et son procédé de fabrication. La structure de pixel comprend : un substrat (11); une couche d'électrode d'anode (12) disposée sur le substrat (11); une pluralité d'unités de pixel (15) disposée sur la couche d'électrode d'anode (12) et agencée dans un réseau rectangulaire, chacune des unités de pixel (15) comprenant quatre unités de sous-pixel (151, 152, 153, 154) disposées dans un réseau rectangulaire, et les couleurs d'émission de deux unités de sous-pixels (151, 152, 153, 154) se faisant face sur le côté adjacent de deux unités de pixel adjacentes quelconques (15) sont identiques; et une couche d'électrode de cathode (18) disposée sur la pluralité d'unités de pixel (15). Par conséquent, lorsqu'un photo-masque métallique est utilisé pour former la pluralité d'unités de pixel (15), une ouverture de masque peut être partagée par une unité de sous-pixel (151, 152, 153, 154) d'au moins quatre unités de pixel (15), de manière à améliorer la capacité de traitement du photo-masque métallique et la résolution d'un écran d'affichage.
(ZH) 一种像素结构及制作方法,该像素结构包括:一基板(11);阳极电极层(12),其设置于基板(11)上;多个像素单元(15),其设置于阳极电极层(12)上并呈矩形阵列排布,每一像素单元(15)包括四个呈矩形阵列排布的子像素单元(151,152,153,154);任意相邻两个像素单元(15)的相邻的一侧上的相互正对的两个子像素单元(151,152,153,154)的发光颜色相同;阴极电极层(18),其设置于多个像素单元(15)之上。因此,在采用金属光罩来形成该多个像素单元(15)时,可以使得至少四个像素单元(15)的一个子像素单元(151,152,153,154)共用一个光罩开口,从而提高金属光罩的制程能力和显示屏的解析度。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)