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1. (WO2018034308) POLISHING METHOD, POLISHING DEVICE, AND RECORDING MEDIUM WITH COMPUTER PROGRAM RECORDED THEREON
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/034308 International Application No.: PCT/JP2017/029453
Publication Date: 22.02.2018 International Filing Date: 16.08.2017
IPC:
B24B 37/015 (2012.01) ,B24B 37/34 (2012.01) ,B24B 49/14 (2006.01) ,H01L 21/304 (2006.01)
B PERFORMING OPERATIONS; TRANSPORTING
24
GRINDING; POLISHING
B
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
37
Lapping machines or devices; Accessories
005
Control means for lapping machines or devices
015
Temperature control
B PERFORMING OPERATIONS; TRANSPORTING
24
GRINDING; POLISHING
B
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
37
Lapping machines or devices; Accessories
34
Accessories
B PERFORMING OPERATIONS; TRANSPORTING
24
GRINDING; POLISHING
B
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
49
Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
14
taking regard of the temperature during grinding
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304
Mechanical treatment, e.g. grinding, polishing, cutting
Applicants: EBARA CORPORATION[JP/JP]; 11-1, Haneda Asahi-cho, Ohta-ku, Tokyo 1448510, JP
Inventors: KABASAWA, Masashi; JP
MATSUO, Hisanori; JP
Agent: HIROSAWA, Tetsuya; JP
WATANABE, Isamu; JP
Priority Data:
2016-15996317.08.2016JP
Title (EN) POLISHING METHOD, POLISHING DEVICE, AND RECORDING MEDIUM WITH COMPUTER PROGRAM RECORDED THEREON
(FR) PROCÉDÉ DE POLISSAGE, DISPOSITIF DE POLISSAGE ET SUPPORT D'ENREGISTREMENT SUR LEQUEL EST ENREGISTRÉ UN PROGRAMME INFORMATIQUE
(JA) 研磨方法、研磨装置、およびコンピュータプログラムを記録した記録媒体
Abstract:
(EN) The present invention relates to a polishing method for polishing a substrate such as a wafer. The polishing method comprises: polishing a substrate (W) by pressing the substrate (W) against the surface of a polishing pad (3); changing the surface temperature of the polishing pad (3) by operating flow rate control valves (42, 56) that are for controlling the flow rate of a fluid flowing through a pad temperature adjusting member (11) during the polishing of the substrate (W); measuring the surface temperature of the polishing pad (3); computing a PID parameter on the basis of a change in the surface temperature of the polishing pad (3) over time; calculating operation quantities of the flow rate control valves (42, 56) that are for minimizing the deviation between a target temperature value and a measured value of the surface temperature of the polishing pad by using a PID arithmetic expression that includes the PID parameter; and operating the flow rate control valves (42, 56) in accordance with the operation quantities during the polishing of the substrate (W).
(FR) La présente invention concerne un procédé de polissage pour polir un substrat tel qu'une tranche. Le procédé de polissage comprend : le polissage d'un substrat (W) par pression du substrat (W) contre la surface d'un tampon à polir (3) ; la modification de la température de surface du tampon à polir (3) par l’actionnement de vannes de commande de débit (42, 56) qui sont destinées à commander le débit d'un fluide s'écoulant dans un élément de réglage de température de tampon (11) pendant le polissage du substrat (W) ; la mesure de la température de surface du tampon à polir (3) ; le calcul d’un paramètre PID sur la base d'un changement de la température de surface du tampon à polir (3) au fil du temps ; le calcul des degrés d’actionnement des vannes de commande de débit (42, 56) qui sont destinées à réduire au minimum l'écart entre une valeur de température cible et une valeur mesurée de la température de surface du tampon à polir à l'aide d'une expression arithmétique PID qui comprend le paramètre PID ; et l’actionnement des vannes de régulation de débit (42, 56) en fonction des degrés d’actionnement pendant le polissage du substrat (W).
(JA) 本発明は、ウェーハなどの基板を研磨する研磨方法に関するものである。研磨方法は、基板(W)を研磨パッド(3)の表面に押し付けて基板(W)を研磨し、基板(W)の研磨中に、パッド温度調整部材(11)に流れる流体の流量を制御するための流量制御バルブ(42,56)を操作することで、研磨パッド(3)の表面温度を変化させ、研磨パッド(3)の表面温度を測定し、研磨パッド(3)の表面温度の時間変化に基づいて、PIDパラメータを算定し、PIDパラメータを備えたPID演算式を用いて、温度目標値と研磨パッドの表面温度の測定値との偏差を最小にするための流量制御バルブ(42,56)の操作量を計算し、基板Wの研磨中に、操作量に従って流量制御バルブ(42,56)を操作する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)