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1. (WO2018033587) ELECTRONIC DEVICE
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Pub. No.: WO/2018/033587 International Application No.: PCT/EP2017/070806
Publication Date: 22.02.2018 International Filing Date: 17.08.2017
IPC:
H01L 33/62 (2010.01) ,H01L 25/075 (2006.01) ,H01L 33/64 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
075
the devices being of a type provided for in group H01L33/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
64
Heat extraction or cooling elements
Applicants:
OSRAM OPTO SEMICONDUCTORS GMBH [DE/DE]; Leibnizstr. 4 93055 Regensburg, DE
Inventors:
LIM, Choo Kean; MY
NG, Kok Eng; MY
Agent:
PATENT ATTORNEYS WILHELM & BECK; Prinzenstr. 13 80639 Munich, DE
Priority Data:
10 2016 115 224.217.08.2016DE
Title (EN) ELECTRONIC DEVICE
(FR) DISPOSITIF ÉLECTRONIQUE
Abstract:
(EN) The invention relates to an electronic device comprising a carrier and a semiconductor chip. The carrier comprises a first dielectric layer and a second dielectric layer. A thermal conductivity of the first dielectric layer exceeds a thermal conductivity of the second dielectric layer. The second dielectric layer is arranged on the first dielectric layer and partially covers the first dielectric layer. The first and/or the second dielectric layer are deposited by a printing process. The semiconductor chip is arranged on the carrier in a mounting area. The carrier comprises a solder terminal for electrical contacting. The solder terminal is arranged on the second dielectric layer. The invention further relates to a method for producing an electronic device.
(FR) L'invention concerne un dispositif électronique comprenant un support et une puce semi-conductrice. Le support comprend une première couche diélectrique et une seconde couche diélectrique. Une conductivité thermique de la première couche diélectrique dépasse une conductivité thermique de la seconde couche diélectrique. La seconde couche diélectrique est agencée sur la première couche diélectrique et recouvre partiellement la première couche diélectrique. La première et/ou la seconde couche diélectrique sont déposées par un procédé d'impression. La puce semi-conductrice est disposée sur le support dans une zone de montage. Le support comprend une borne de soudure pour la mise en contact électrique. La borne de soudure est agencée sur la seconde couche diélectrique. L'invention concerne également un procédé de production d'un dispositif électronique.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)