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1. (WO2018026482) MECHANISM TO ACCELERATE GRAPHICS WORKLOADS IN A MULTI-CORE COMPUTING ARCHITECTURE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/026482 International Application No.: PCT/US2017/041746
Publication Date: 08.02.2018 International Filing Date: 12.07.2017
IPC:
G06F 9/30 (2006.01) ,G06F 9/50 (2006.01)
Applicants: INTEL IP CORPORATION[US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors: BENTHIN, Carsten; DE
WOOP, Sven; DE
WALD, Ingo; US
Agent: MALLIE, Michael J.; US
LINDEEN, III, Gordon R.; US
VINCENT, Lester J.; US
Priority Data:
15/229,55005.08.2016US
Title (EN) MECHANISM TO ACCELERATE GRAPHICS WORKLOADS IN A MULTI-CORE COMPUTING ARCHITECTURE
(FR) MÉCANISME PERMETTANT D'ACCÉLÉRER DES CHARGES DE TRAVAIL GRAPHIQUES DANS UNE ARCHITECTURE INFORMATIQUE MULTICŒUR
Abstract: front page image
(EN) A processing apparatus is described. The apparatus includes a plurality of processing cores, including a first processing core and a second processing core a first field programmable gate array (FPGA) coupled to the first processing core to accelerate execution of graphics workloads processed at the first processing core and a second FPGA coupled to the second processing core to accelerate execution of workloads processed at the second processing core.
(FR) L'invention concerne un appareil de traitement. L'appareil comprend une pluralité de cœurs de traitement, comprenant un premier cœur de traitement et un second cœur de traitement, un premier réseau prédiffusé programmable par l'utilisateur (FPGA) couplé au premier cœur de traitement pour accélérer l'exécution des charges de travail graphiques traitées au niveau du premier cœur de traitement et un second FPGA couplé au second cœur de traitement pour accélérer l'exécution des charges de travail traitées au niveau du second cœur de traitement.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)