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1. (WO2018024509) COMPONENT AND METHOD FOR MANUFACTURING COMPONENTS
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Pub. No.: WO/2018/024509 International Application No.: PCT/EP2017/068470
Publication Date: 08.02.2018 International Filing Date: 21.07.2017
IPC:
H01L 33/00 (2010.01) ,H01L 33/62 (2010.01) ,H01L 33/64 (2010.01) ,H01L 27/15 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
64
Heat extraction or cooling elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
15
including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
Applicants:
OSRAM OPTO SEMICONDUCTORS GMBH [DE/DE]; Leibnizstr. 4 93055 Regensburg, DE
Inventors:
OTTO, Isabel; DE
PERZLMAIER, Korbinian; DE
Agent:
EPPING HERMANN FISCHER PATENTANWALTSGESELLSCHAFT MBH; Schloßschmidstr. 5 80639 München, DE
Priority Data:
10 2016 114 550.505.08.2016DE
Title (EN) COMPONENT AND METHOD FOR MANUFACTURING COMPONENTS
(FR) COMPOSANT ET PROCÉDÉ DE FABRICATION DE COMPOSANTS
(DE) BAUELEMENT UND VERFAHREN ZUR HERSTELLUNG VON BAUELEMENTEN
Abstract:
(EN) The invention relates to a component (100) comprising a carrier (1) and a semiconductor body (2) arranged on the carrier and having an optically active layer (23), in which the carrier comprises a contiguous metal carrier layer (3) which mechanically stabilises the component. Furthermore, the carrier comprises a mirror layer (5) which is arranged between the semiconductor body and the carrier layer. The carrier also comprises a compensation layer (4) that directly borders the carrier layer and is designed to compensate inner mechanical strains of the component. The invention also relates to a method for producing a plurality of such components.
(FR) La présente invention concerne un composant (100) comprenant un support (1) et un corps semi-conducteur (2) disposé sur le support et doté d’une couche optiquement active (23), le support présentant une couche de support métallique (3) qui est conçue de manière contiguë et stabilise le composant mécaniquement. Le support présente en outre une couche miroir (5) qui se trouve entre le corps semi-conducteur et la couche support. Le support présente en outre une couche de compensation (4) qui est directement adjacente à la couche de support et est conçue pour compenser les contraintes mécaniques internes du composant. L'invention concerne en outre un procédé qui est approprié pour la fabrication d’une pluralité de composants de ce type.
(DE) Es wird ein Bauelement (100) mit einem Träger (1) und einem auf dem Träger angeordneten Halbleiterkörper (2) mit einer optisch aktiven Schicht (23) angegeben, bei dem der Träger eine metallische Trägerschicht (3) aufweist, die zusammenhängend ausgebildet ist und das Bauelement mechanisch stabilisiert. Des Weiteren weist der Träger eine Spiegelschicht (5) auf, die zwischen dem Halbleiterkörper und der Trägerschicht angeordnet ist. Der Träger weist außerdem eine Ausgleichsschicht (4) auf, die unmittelbar an die Trägerschicht angrenzt und zur Kompensierung innerer mechanischer Verspannungen des Bauelements eingerichtet ist. Des Weiteren wird ein Verfahren angegeben, das zur Herstellung einer Mehrzahl von solchen Bauelementen geeignet ist.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: German (DE)
Filing Language: German (DE)