Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018012598) SEMICONDUCTOR APPARATUS
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/012598 International Application No.: PCT/JP2017/025584
Publication Date: 18.01.2018 International Filing Date: 13.07.2017
IPC:
H01L 29/78 (2006.01) ,H01L 21/28 (2006.01) ,H01L 21/283 (2006.01) ,H01L 21/336 (2006.01) ,H01L 29/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
283
Deposition of conductive or insulating materials for electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
Applicants:
ローム株式会社 ROHM CO., LTD. [JP/JP]; 京都府京都市右京区西院溝崎町21番地 21, Saiin Mizosaki-cho, Ukyo-ku, Kyoto-shi, Kyoto 6158585, JP
国立大学法人大阪大学 OSAKA UNIVERSITY [JP/JP]; 大阪府吹田市山田丘1番1号 1-1 Yamadaoka, Suita-shi, Osaka 5650871, JP
Inventors:
山本 兼司 YAMAMOTO, Kenji; JP
明田 正俊 AKETA, Masatoshi; JP
浅原 浩和 ASAHARA, Hirokazu; JP
中村 孝 NAKAMURA, Takashi; JP
細井 卓治 HOSOI, Takuji; JP
渡部 平司 WATANABE, Heiji; JP
志村 考功 SHIMURA, Takayoshi; JP
東雲 秀司 AZUMO, Shuji; JP
柏木 勇作 KASHIWAGI, Yusaku; JP
Agent:
特許業務法人あい特許事務所 AI ASSOCIATION OF PATENT AND TRADEMARK ATTORNEYS; 大阪府大阪市中央区南本町二丁目6番12号 サンマリオンNBFタワー21階 Sun Mullion NBF Tower, 21st Floor, 6-12, Minamihommachi 2-chome, Chuo-ku, Osaka-shi, Osaka 5410054, JP
Priority Data:
2016-14062015.07.2016JP
Title (EN) SEMICONDUCTOR APPARATUS
(FR) APPAREIL À SEMI-CONDUCTEURS
(JA) 半導体装置
Abstract:
(EN) This semiconductor apparatus has an MIS structure that includes: a semiconductor layer; a gate insulating film on the semiconductor layer; and a gate electrode on the gate insulating film. The gate insulating film has a laminate structure that includes: a substrate SiO2 layer; and a High-k layer that contains Hf located on the substrate SiO2 layer. The gate electrode includes a section that is made of a metal material having a work function larger than 4.6 eV at least in a part in contact with the High-k layer.
(FR) La présente invention concerne un appareil à semi-conducteurs qui présente une structure MIS qui comprend : une couche semi-conductrice ; un film d'isolation de grille sur la couche semi-conductrice ; et une électrode de grille sur le film d'isolation de grille. Le film d'isolation de grille présente une structure stratifiée qui comprend : une couche de substrat à base de SiO2 ; et une couche à k élevé qui contient du hafnium (Hf) située sur la couche de substrat à base de SiO2. L'électrode de grille comprend une section qui est constituée d'un matériau métallique ayant une fonction de travail supérieure à 4,6 eV au moins dans une partie en contact avec la couche à k élevé.
(JA) 半導体装置は、半導体層と、前記半導体層上のゲート絶縁膜と、前記ゲート絶縁膜上のゲート電極とを含むMIS構造を有し、前記ゲート絶縁膜は、下地SiO層および前記下地SiO層上のHfを含有するHigh-k層を含む積層構造を有し、前記ゲート電極は、少なくとも前記High-k層と接する部分に、4.6eVよりも大きい仕事関数を有する金属材料からなる部分を含む。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)