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1. (WO2018009169) ENGINEERING TENSILE STRAIN BUFFER IN ART FOR HIGH QUALITY GE CHANNEL

Pub. No.:    WO/2018/009169    International Application No.:    PCT/US2016/040909
Publication Date: Fri Jan 12 00:59:59 CET 2018 International Filing Date: Sun Jul 03 01:59:59 CEST 2016
IPC: H01L 29/78
Applicants: INTEL CORPORATION
Inventors: LE, Van H.
CHU-KUNG, Benjamin
RACHMADY, Willy
FRENCH, Marc, C.
SUNG, Seung Hoon
KAVALIEROS, Jack, T.
METZ, Matthew, V.
AGRAWAL, Ashish
Title: ENGINEERING TENSILE STRAIN BUFFER IN ART FOR HIGH QUALITY GE CHANNEL
Abstract:
An apparatus including a transistor device including a channel including germanium disposed on a substrate; a buffer layer disposed on the substrate between the channel and the substrate, wherein the buffer layer includes silicon germanium; and a seed layer disposed on the substrate between the buffer layer and the substrate, wherein the seed layer includes germanium. A method including forming seed layer on a silicon substrate, wherein the seed layer includes germanium; forming a buffer layer on the seed layer, wherein the buffer layer includes silicon germanium; and forming a transistor device including a channel on the buffer layer.