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1. (WO2018005871) ENHANCING MEMORY YIELD AND INTEGRATED CIRCUIT PERFORMANCE THROUGH NANOWIRE SELF-HEATING

Pub. No.:    WO/2018/005871    International Application No.:    PCT/US2017/040113
Publication Date: Fri Jan 05 00:59:59 CET 2018 International Filing Date: Fri Jun 30 01:59:59 CEST 2017
IPC: G11C 29/44
G11C 5/06
Applicants: SYNOPSYS, INC.
Inventors: KAWA, Jamil
MOROZ, Victor
Title: ENHANCING MEMORY YIELD AND INTEGRATED CIRCUIT PERFORMANCE THROUGH NANOWIRE SELF-HEATING
Abstract:
A method for improving an integrated circuit design which has transistors with nanowire channels comprises identifying a particular device having a particular transistor with a nanowire channel; and adding to the integrated circuit design circuitry which, when activated, repairs the particular transistor by self-heating. The method can comprise determining a memory cell that has a read current below a passing criteria, the memory cell having a transistor with a nanowire channel on a current path through which the read current flows; and applying a stress on the memory cell to repair the nanowire channel of the transistor in the memory cell on the current path. The determining step can include sensing read currents of memory cells in an array of memory cells; and determining one or more memory cells in the array of memory cells having read currents below the passing criteria, using the read currents sensed.