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1. (WO2018004667) TWO TRANSISTOR MEMORY CELL USING HIGH MOBILITY METAL OXIDE SEMICONDUCTORS

Pub. No.:    WO/2018/004667    International Application No.:    PCT/US2016/040764
Publication Date: Fri Jan 05 00:59:59 CET 2018 International Filing Date: Sat Jul 02 01:59:59 CEST 2016
IPC: H01L 27/11
H01L 27/108
H01L 27/115
Applicants: INTEL CORPORATION
Inventors: LE, Van H.
DEWEY, Gilbert William
RADOSAVLJEVIC, Marko
RIOS, Rafael
KAVALIEROS, Jack T.
SHIVARAMAN, Shriram
METERELLIYOZ, Mesut
Title: TWO TRANSISTOR MEMORY CELL USING HIGH MOBILITY METAL OXIDE SEMICONDUCTORS
Abstract:
A two transistor memory cell is described that uses high mobility amorphous oxide semiconductors. In one example, a sensing transistor has a source and a drain in a first metal layer and a gate between the source and the drain. The gate has a channel formed of a metal oxide semiconductor. A charging transistor has a source and a drain in a second metal layer and a gate channel also formed of metal oxide semiconductor, wherein the source of the charging transistor is coupled to the gate of the sensing transistor, and a gate electrode in a third metal layer is coupled to the gate of the charging transistor.