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1. (WO2018004565) TECHNIQUES FOR FORMING III-N SEMICONDUCTOR DEVICES WITH INTEGRATED DIAMOND HEAT SPREADER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2018/004565 International Application No.: PCT/US2016/040051
Publication Date: 04.01.2018 International Filing Date: 29.06.2016
IPC:
H01L 29/66 (2006.01) ,H01L 29/78 (2006.01) ,H01L 21/8238 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8238
Complementary field-effect transistors, e.g. CMOS
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
DASGUPTA, Sansaptak; US
THEN, Han Wui; US
RADOSAVLJEVIC, Marko; US
FISCHER, Paul B.; US
Agent:
RAYMOND, Jonathan R.; US
Priority Data:
Title (EN) TECHNIQUES FOR FORMING III-N SEMICONDUCTOR DEVICES WITH INTEGRATED DIAMOND HEAT SPREADER
(FR) TECHNIQUES DE FORMATION DE DISPOSITIFS SEMI-CONDUCTEURS III-N À DISSIPATEUR THERMIQUE EN DIAMANT INTÉGRÉ
Abstract:
(EN) Techniques are disclosed for forming III-N semiconductor devices including integrated diamond heat spreader structures. In accordance with some embodiments, through-hole features may be formed in a silicon (Si) or other semiconductor substrate under a back side of a power amplifier device and filled, in part or in whole, with diamond material. In accordance with other embodiments, one or more layers of diamond material may be formed over a front side of a power amplifier device. The presence of diamond layers or structures (or both) may serve to facilitate heat dissipation for the host architecture, in accordance with some embodiments. The disclosed techniques may be used, for example, in fabricating high-power-density gallium nitride (GaN)-based radio frequency (RF) power amplifiers having integrated diamond heat spreaders configured to provide efficient heat extraction and thermal conductivity from the front and/or back side thereof. The improved heat extraction performance may lead to improved device reliability.
(FR) L'invention concerne des techniques de formation de dispositifs semi-conducteurs III-N comprenant des structures de dissipateur thermique en diamant intégré. Selon certains modes de réalisation, des trous traversants peuvent être formés dans un silicium (Si) ou un autre substrat semi-conducteur sous le côté arrière d'un dispositif amplificateur de puissance et remplis, en partie ou en totalité, de matériau de diamant. Selon d'autres modes de réalisation, une ou plusieurs couches de matériau en diamant peuvent être formées sur un côté avant d'un dispositif amplificateur de puissance. La présence de couches ou de structures de diamant (ou les deux) peut servir à faciliter la dissipation de chaleur pour l'architecture hôte, selon certains modes de réalisation. Les techniques décrites peuvent être utilisées, par exemple, dans la fabrication des amplificateurs de puissance radiofréquence (RF) à base de nitrure de gallium (GaN) à densité de puissance élevée ayant des dissipateurs thermiques en diamant intégrés configurés pour fournir une extraction de chaleur efficace et une conductivité thermique à partir de ses côtés avant et/ou arrière. L’efficacité améliorée d'extraction de chaleur peut conduire à une fiabilité améliorée du dispositif.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)