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1. WO2017201703 - BACKSIDE METAL STRUCTURE OF POWER SEMICONDUCTOR CHIP AND PREPARATION METHOD THEREFOR

Publication Number WO/2017/201703
Publication Date 30.11.2017
International Application No. PCT/CN2016/083433
International Filing Date 26.05.2016
IPC
H01L 23/58 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for
H01L 23/532 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532characterised by the materials
H01L 21/28 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
CPC
H01L 21/28
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
H01L 23/532
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532characterised by the materials
H01L 23/58
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for ; , e.g. in combination with batteries
Applicants
  • 中山港科半导体科技有限公司 ZHONGSHAN HKG TECHNOLOGIES LIMITED [CN]/[CN]
Inventors
  • 艾哈迈德伊夫蒂哈尔 AHMED, Iftikhar
  • 舒小平 SHU, Xiaoping
  • 徐远梅 XU, Yuanmei
Agents
  • 深圳市千纳专利代理有限公司 SHENZHEN QIANNA PATENT AGENCY LTD
Priority Data
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) BACKSIDE METAL STRUCTURE OF POWER SEMICONDUCTOR CHIP AND PREPARATION METHOD THEREFOR
(FR) STRUCTURE MÉTALLIQUE ARRIÈRE DE PUCE DE SEMI-CONDUCTEUR DE PUISSANCE ET SON PROCÉDÉ DE PRÉPARATION
(ZH) 一种功率半导体芯片背面金属结构及其制备方法
Abstract
(EN)
Provided are a backside metal structure of a power semiconductor chip and a preparation method therefor. Beginning from the position of the backside of the chip in contact with silicon, the metal structure successively comprises: an NixSiy layer, the thickness of the NixSiy layer being 2 nm - 20 nm, wherein x : y is (1-2) : (1-2); a titanium layer, the thickness of the titanium layer being 50 nm - 150 nm; a nickel layer, the thickness of the nickel layer being 100 nm - 300 nm; and a silver layer, the thickness of the silver layer being 500 nm - 2000 nm. The provided backside metal structure of a power semiconductor chip has a smaller parasitic resistance, which is beneficial to reduce the conduction loss of the power semiconductor chip.
(FR)
L'invention porte sur une structure métallique arrière d'une puce de semi-conducteur de puissance et sur son procédé de préparation. Partant de la position du côté arrière de la puce en contact avec le silicium, la structure métallique comprend successivement : une couche de NixSiy, l'épaisseur de la couche de NixSiy étant de 2 nm à 20 nm, où x : y est (1-2) : (1-2) ; une couche de titane, l'épaisseur de la couche de titane étant de 50 nm à 150 nm ; une couche de nickel, l'épaisseur de la couche de nickel étant de 100 nm à 300 nm ; et une couche d'argent, l'épaisseur de la couche d'argent étant de 500 nm à 2 000 nm. La structure métallique arrière d'une puce de semi-conducteur de puissance selon l'invention présente une résistance parasite plus petite, ce qui est avantageux pour réduire la perte de conduction de la puce de semi-conducteur de puissance.
(ZH)
提供了一种功率半导体芯片背面金属结构及其制备方法,该金属结构自芯片背面与硅接触的位置开始依次为:Ni xSi y层,所述Ni xSi y层的厚度为2nm-20nm,其中x∶y为(1-2)∶(1-2);钛层,钛层的厚度为50nm-150nm;镍层,镍层的厚度为100nm-300nm;银层,银层的厚度为500nm-2000nm。所提供的功率半导体芯片的背面金属结构,其寄生电阻更小,有利于降低功率半导体芯片的导通损耗。
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