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1. (WO2017200637) SYSTEMS AND METHODS FOR ALIGNING AND COUPLING SEMICONDUCTOR STRUCTURES
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Pub. No.: WO/2017/200637 International Application No.: PCT/US2017/024269
Publication Date: 23.11.2017 International Filing Date: 27.03.2017
IPC:
H01L 21/027 (2006.01) ,H01L 21/68 (2006.01) ,H01L 21/683 (2006.01) ,H01L 21/98 (2006.01) ,H01L 25/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
027
Making masks on semiconductor bodies for further photolithographic processing, not provided for in group H01L21/18 or H01L21/34165
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67
Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
68
for positioning, orientation or alignment
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67
Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683
for supporting or gripping
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
98
Assembly of devices consisting of solid state components formed in or on a common substrate; Assembly of integrated circuit devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
Applicants:
MASSACHUSETTS INSTITUTE OF TECHNOLOGY [US/US]; 77 Massachusetts Avenue Cambridge, Massachusetts 02139, US
Inventors:
WARNER, Keith; US
D'ONOFRIO, Richard, P.; US
YOST, Donna-Ruth, W.; US
Agent:
DALY, Christopher, S.; US
LANGE, Kristoffer, W.; US
WHITE, James, M.; US
CROOKER, Albert, C.; US
THOMAS, William, R.; US
MILMAN, Seth, A.; US
ROBINSON, Kermit; US
MOOSEY, Anthony, T.; US
DURKEE, Paul, D.; US
CROWLEY, Judith, C.; US
MOFFORD, Donald, F.; US
DOWNING, Marianne, M.; US
FLINDERS, Matthew; US
Priority Data:
15/388,62522.12.2016US
62/336,92916.05.2016US
Title (EN) SYSTEMS AND METHODS FOR ALIGNING AND COUPLING SEMICONDUCTOR STRUCTURES
(FR) SYSTÈMES ET PROCÉDÉS D'ALIGNEMENT ET DE COUPLAGE DE STRUCTURES SEMI-CONDUCTRICES
Abstract:
(EN) A system and method for aligning at least two semiconductor structures for coupling includes an alignment device having a first semiconductor mounting portion movably coupled to a first portion of a mounting structure and a second semiconductor mounting portion movably coupled to a second portion of the mounting structure. The alignment device further includes one or more imaging devices disposed above at least one of the first and second mounting portions of the alignment device, the imaging devices configured to capture and/or or detect alignment marks in at least one of the semiconductor structures to be coupled. The alignment method includes bringing the semiconductor structures into intermittent contact prior to bonding the semiconductor structures to each other.
(FR) Un système et un procédé d'alignement d'au moins deux structures semi-conductrices en vue d'un couplage comprend un dispositif d'alignement ayant une première partie de montage de semi-conducteur couplée mobile à une première partie d'une structure de montage et une seconde partie de montage de semi-conducteur couplée mobile à une seconde partie de la structure de montage. Le dispositif d'alignement comprend en outre un ou plusieurs dispositifs d'imagerie disposés au-dessus d'au moins l'une des première et seconde parties de montage du dispositif d'alignement, les dispositifs d'imagerie étant configurés pour capturer et/ou détecter des marques d'alignement dans au moins une des structures semi-conductrices à coupler. Le procédé d'alignement consiste à amener les structures semi-conductrices en contact intermittent avant de lier les structures semi-conductrices les unes aux autres.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)