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|1. (WO2017200159) OVERLAY MARK, AND OVERLAY MEASUREMENT METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING SAME|
|Applicants:||AUROS TECHNOLOGY, INC.
|Inventors:||CHANG, Hyun Jin
HA, Ho Cheul
LEE, Ghil Soo
|Title:||OVERLAY MARK, AND OVERLAY MEASUREMENT METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING SAME|
The present invention relates to an overlay mark, and an overlay measurement method and a semiconductor device manufacturing method using the same. The present invention provides an overlay mark for determining the relative shift between two successive pattern layers or between two or more patterns separately formed on a single layer, the overlay mark comprising: a first overlay structure that includes a pair of first bars facing one another and extending in a first direction, and a pair of second bars facing one another and extending in a second direction that is orthogonal to the first direction; and a second overlay structure that includes a plurality of pairs of third bars parallel to the first bars, and a plurality of pairs of fourth bars parallel to the second bars, wherein the gaps between neighbouring third bars are different from one another, and the gaps between neighbouring fourth bars are different from one another. The overlay mark according to the present invention has different gaps between bars, thereby being capable of minimising the occurrence of errors during image analysis.