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1. (WO2017200011) SUBSTRATE FOR ELECTRONIC ELEMENT MOUNTING AND ELECTRONIC DEVICE
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Pub. No.: WO/2017/200011 International Application No.: PCT/JP2017/018554
Publication Date: 23.11.2017 International Filing Date: 17.05.2017
IPC:
H01L 23/02 (2006.01) ,H01L 23/12 (2006.01) ,H01L 23/15 (2006.01) ,H01L 27/146 (2006.01) ,H01L 33/64 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
02
Containers; Seals
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
14
characterised by the material or its electrical properties
15
Ceramic or glass substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144
Devices controlled by radiation
146
Imager structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
64
Heat extraction or cooling elements
Applicants:
京セラ株式会社 KYOCERA CORPORATION [JP/JP]; 京都府京都市伏見区竹田鳥羽殿町6番地 6, Takeda Tobadono-cho, Fushimi-ku, Kyoto-shi, Kyoto 6128501, JP
Inventors:
堀内 加奈江 HORIUCHI, Kanae; JP
Priority Data:
2016-10129520.05.2016JP
Title (EN) SUBSTRATE FOR ELECTRONIC ELEMENT MOUNTING AND ELECTRONIC DEVICE
(FR) SUBSTRAT DE MONTAGE D'ÉLÉMENT ÉLECTRONIQUE ET DISPOSITIF ÉLECTRONIQUE
(JA) 電子素子実装用基板および電子装置
Abstract:
(EN) This substrate for electronic element mounting is provided with an inorganic substrate, a frame body and a bonding material. The inorganic substrate has: a mounting region, on the upper surface of which an electronic element is to be mounted; and a peripheral region which surrounds the mounting region. The frame body is arranged on the peripheral region of the inorganic substrate, and surrounds the mounting region. The bonding material is arranged between the inorganic substrate and the frame body in the peripheral region. The bonding material has a plurality of empty spaces.
(FR) L'invention concerne un substrat de montage d'élément électronique comprenant un substrat inorganique, un corps de cadre et un matériau de liaison. Le substrat inorganique comporte: une zone de montage sur la surface supérieure de laquelle un élément électronique doit être monté; et une zone périphérique entourant la zone de montage. Le corps de cadre est disposé sur la zone périphérique du substrat inorganique et entoure la zone de montage. Le matériau de liaison est disposé entre le substrat inorganique et le corps de cadre dans la zone périphérique. Le matériau de liaison présente une pluralité d'espaces vides.
(JA) 無機基板と、枠体と、接合材とを備えている。無機基板は、上面に電子素子が実装される実装領域と実装領域を取り囲んで位置した周辺領域とを有する。枠体は、無機基板の周辺領域に位置し、実装領域を取り囲んでいる。接合材は、無機基板と枠体との間であって、周辺領域に位置している。接合材は複数の空間部を有している。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)