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1. (WO2017198687) METHOD FOR FABRICATING A STRAINED SEMICONDUCTOR-ON-INSULATOR SUBSTRATE

Pub. No.:    WO/2017/198687    International Application No.:    PCT/EP2017/061793
Publication Date: Fri Nov 24 00:59:59 CET 2017 International Filing Date: Thu May 18 01:59:59 CEST 2017
IPC: H01L 21/762
Applicants: SOITEC
Inventors: SCHWARZENBACH, Walter
CHABANNE, Guillaume
DAVAL, Nicolas
Title: METHOD FOR FABRICATING A STRAINED SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
Abstract:
The invention relates to a method for fabricating a strained semiconductor-on-insulator substrate, comprising: (a) the provision of a donor substrate (1) comprising a monocrystalline semiconductor layer (12); (b) the provision of a receiving substrate (2) comprising a surface layer (20) of a strained monocrystalline semiconductor material; (c) the bonding of the donor substrate (1) to the receiving substrate (2), a dielectric layer (13, 22) being at the interface; (d) the transfer of the monocrystalline semiconductor layer (12) from the donor substrate to the receiving substrate; (e) the cutting, by means of trench isolations (T) extending into the receiving substrate (2) beyond the strained semiconductor material layer (20), of a portion from a stack formed from the transferred monocrystalline semiconductor layer, from the dielectric layer and from the strained semiconductor material layer, said cutting operation resulting in the relaxation of the strain in the strained semiconductor material, and in the application of at least a part of said strain to the transferred monocrystalline semiconductor layer. The donor substrate (1) comprises a monocrystalline carrier substrate (10), an intermediate layer (11) and said monocrystalline semiconductor layer (12), the intermediate layer (11) forming an etch-stop layer with respect to the carrier substrate material (10) and to the material of the monocrystalline semiconductor layer (12), step (d) comprising the transfer of the monocrystalline semiconductor layer (12), of the intermediate layer (11) and of a portion (15) of the carrier substrate (10). Between steps (d) and (e), a first operation of selectively etching said portion (15) of the carrier substrate with respect to said intermediate layer (11) and a second operation of selectively etching said intermediate layer (11) with respect to the monocrystalline semiconductor layer (12) are implemented.