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1. (WO2017188203) METHOD FOR PRODUCING SEMICONDUCTOR CHIP EQUIPPED WITH PROTECTIVE FILM, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
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Pub. No.: WO/2017/188203 International Application No.: PCT/JP2017/016261
Publication Date: 02.11.2017 International Filing Date: 25.04.2017
IPC:
H01L 21/301 (2006.01) ,C09J 7/02 (2006.01) ,C09J 201/00 (2006.01) ,H01L 23/00 (2006.01) ,H01L 23/29 (2006.01) ,H01L 23/31 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
301
to subdivide a semiconductor body into separate parts, e.g. making partitions
C CHEMISTRY; METALLURGY
09
DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
J
ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
7
Adhesives in the form of films or foils
02
on carriers
C CHEMISTRY; METALLURGY
09
DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
J
ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
201
Adhesives based on unspecified macromolecular compounds
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
29
characterised by the material
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
Applicants: LINTEC CORPORATION[JP/JP]; 23-23, Honcho, Itabashi-ku, Tokyo 1730001, JP
Inventors: INAO Youichi; JP
SATO Akinori; JP
Agent: SHIGA Masatake; JP
TAKAHASHI Norio; JP
IGARASHI Koei; JP
Priority Data:
2016-09203328.04.2016JP
Title (EN) METHOD FOR PRODUCING SEMICONDUCTOR CHIP EQUIPPED WITH PROTECTIVE FILM, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
(FR) PROCÉDÉ DE PRODUCTION D'UNE PUCE À SEMI-CONDUCTEURS POURVUE D'UN FILM PROTECTEUR, ET PROCÉDÉ DE PRODUCTION D'UN DISPOSITIF À SEMI-CONDUCTEURS
(JA) 保護膜付き半導体チップの製造方法及び半導体装置の製造方法
Abstract:
(EN) The present invention relates to a method for producing a semiconductor chip 19 equipped with a protective film, wherein a semiconductor wafer 18 in a laminate provided with a support sheet 10, an energy ray-curable film 13 for forming the protective film, and the semiconductor wafer 18, in that order, is diced, and the film 13 for forming the protective film is subsequently cured by being irradiated with energy rays. The present invention also relates to a method for producing a semiconductor device, wherein the semiconductor chip 19 equipped with the protective film is picked up, and connected to a substrate.
(FR) La présente invention concerne un procédé de production d'une puce à semi-conducteurs (19) pourvue d'un film protecteur, une tranche à semi-conducteurs (18) dans un stratifié comportant une feuille de support (10), un film durcissable par rayonnement d'énergie (13) destiné à former le film protecteur, et ladite tranche à semi-conducteurs (18), se présentant dans cet ordre, étant découpée en dés, et le film (13) destiné à former le film protecteur étant ensuite durci par rayonnement d'énergie. La présente invention concerne également un procédé de production d'un dispositif à semi-conducteurs, la puce à semi-conducteurs (19) pourvue du film protecteur étant prélevée et connectée à un substrat.
(JA) 本発明は、支持シート10、エネルギー線硬化性の保護膜形成用フィルム13及び半導体ウエハ18をこの順に備えた積層体の、半導体ウエハ18をダイシングし、次いで、保護膜形成用フィルム13にエネルギー線を照射して硬化させる、保護膜付き半導体チップ19の製造方法に関する。本発明は、保護膜付き半導体チップ19をピックアップし、半導体チップ19を基板に接続する、半導体装置の製造方法にも関する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)