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1. (WO2017179489) CIRCUIT BOARD, CIRCUIT CONSTITUTING MEMBER, AND CIRCUIT BOARD MANUFACTURING METHOD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2017/179489 International Application No.: PCT/JP2017/014405
Publication Date: 19.10.2017 International Filing Date: 06.04.2017
IPC:
H05K 1/02 (2006.01) ,H05K 1/18 (2006.01)
Applicants: AUTONETWORKS TECHNOLOGIES,LTD.[JP/JP]; 1-14, Nishisuehiro-cho, Yokkaichi-shi, Mie 5108503, JP
SUMITOMO WIRING SYSTEMS,LTD.[JP/JP]; 1-14, Nishisuehiro-cho, Yokkaichi-shi, Mie 5108503, JP
SUMITOMO ELECTRIC INDUSTRIES, LTD.[JP/JP]; 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
Inventors: CHIN, Tou; JP
NAKAMURA, Arinobu; JP
Agent: YAMANO, Hiroshi; JP
Priority Data:
2016-08249115.04.2016JP
Title (EN) CIRCUIT BOARD, CIRCUIT CONSTITUTING MEMBER, AND CIRCUIT BOARD MANUFACTURING METHOD
(FR) CARTE DE CIRCUIT IMPRIMÉ, ÉLÉMENT CONSTITUTIF DE CIRCUIT, ET PROCÉDÉ DE FABRICATION DE CARTE DE CIRCUIT IMPRIMÉ
(JA) 回路基板、回路構成体、及び回路基板の製造方法
Abstract: front page image
(EN) A circuit board comprising an upper surface on which a circuit pattern is formed and a lower surface to which a plurality of bus bars arranged at intervals are fixed, the circuit board being provided with: an arrangement through hole in which an electronic component is disposed penetrating through the upper surface and the lower surface so as to face the bus bars; and a terminal conductor foil which protrudes from the lower surface toward the inside of the arrangement through hole, and to which a terminal of the electronic component is connected.
(FR) L'invention concerne une carte de circuit imprimé qui comprend une surface supérieure sur laquelle un motif de circuit est formé et une surface inférieure sur laquelle une pluralité de barres omnibus agencées à intervalles sont fixées, la carte de circuit imprimé étant pourvue : d'un trou traversant d'agencement, dans lequel un composant électronique est disposé, pénétrant à travers la surface supérieure et la surface inférieure de façon à faire face aux barres omnibus ; et d'une feuille conductrice de borne qui fait saillie de la surface inférieure vers l'intérieur du trou traversant d'agencement, et à laquelle une borne du composant électronique est connectée.
(JA) 回路パターンが形成される上面と、互いに間隔を開けて配置される複数のバスバが固定される下面とを有する回路基板であって、前記バスバに臨むように前記上面と前記下面とを貫通して電子部品が配置される配置用貫通孔と、前記下面から前記配置用貫通孔の内側に向かって突出して前記電子部品の端子が接続される端子用導体箔とを備える回路基板。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)